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From: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
To: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Cc: mark.rutland-5wv7dgnIgG8@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org,
	robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	Heiko Stuebner <heiko.stuebner-K3U4GQvHnyU@public.gmane.org>
Subject: [PATCH 2/6] ARM: dts: rockchip: convert rk3188 to opp-v2
Date: Tue, 13 Nov 2018 14:05:55 +0100	[thread overview]
Message-ID: <20181113130559.31221-3-heiko@sntech.de> (raw)
In-Reply-To: <20181113130559.31221-1-heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>

From: Heiko Stuebner <heiko.stuebner-K3U4GQvHnyU@public.gmane.org>

The fact that OPPs specified only on cpu0 work is Linux specific and
normally cpu frequencies should be specified for each cpu core.
To facilitate this without needing to duplicate the frequency table
each time, convert to opp-v2 before adding references to all cores.

Signed-off-by: Heiko Stuebner <heiko.stuebner-K3U4GQvHnyU@public.gmane.org>
---
 arch/arm/boot/dts/rk3188.dtsi | 55 ++++++++++++++++++++++++++++-------
 1 file changed, 44 insertions(+), 11 deletions(-)

diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index fd896b0a46e3..9d8c4c560e51 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -23,37 +23,70 @@
 			compatible = "arm,cortex-a9";
 			next-level-cache = <&L2>;
 			reg = <0x0>;
-			operating-points = <
-				/* kHz    uV */
-				1608000 1350000
-				1416000 1250000
-				1200000 1150000
-				1008000 1075000
-				 816000  975000
-				 600000  950000
-				 504000  925000
-				 312000  875000
-			>;
 			clock-latency = <40000>;
 			clocks = <&cru ARMCLK>;
+			operating-points-v2 = <&cpu0_opp_table>;
 		};
 		cpu@1 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			next-level-cache = <&L2>;
 			reg = <0x1>;
+			operating-points-v2 = <&cpu0_opp_table>;
 		};
 		cpu@2 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			next-level-cache = <&L2>;
 			reg = <0x2>;
+			operating-points-v2 = <&cpu0_opp_table>;
 		};
 		cpu@3 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			next-level-cache = <&L2>;
 			reg = <0x3>;
+			operating-points-v2 = <&cpu0_opp_table>;
+		};
+	};
+
+	cpu0_opp_table: opp_table0 {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp-312000000 {
+			opp-hz = /bits/ 64 <312000000>;
+			opp-microvolt = <875000>;
+			clock-latency-ns = <40000>;
+		};
+		opp-504000000 {
+			opp-hz = /bits/ 64 <504000000>;
+			opp-microvolt = <925000>;
+		};
+		opp-600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <950000>;
+			opp-suspend;
+		};
+		opp-816000000 {
+			opp-hz = /bits/ 64 <816000000>;
+			opp-microvolt = <975000>;
+		};
+		opp-1008000000 {
+			opp-hz = /bits/ 64 <1008000000>;
+			opp-microvolt = <1075000>;
+		};
+		opp-1200000000 {
+			opp-hz = /bits/ 64 <1200000000>;
+			opp-microvolt = <1150000>;
+		};
+		opp-1416000000 {
+			opp-hz = /bits/ 64 <1416000000>;
+			opp-microvolt = <1250000>;
+		};
+		opp-1608000000 {
+			opp-hz = /bits/ 64 <1608000000>;
+			opp-microvolt = <1350000>;
 		};
 	};
 
-- 
2.18.0

WARNING: multiple messages have this Message-ID (diff)
From: heiko@sntech.de (Heiko Stuebner)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/6] ARM: dts: rockchip: convert rk3188 to opp-v2
Date: Tue, 13 Nov 2018 14:05:55 +0100	[thread overview]
Message-ID: <20181113130559.31221-3-heiko@sntech.de> (raw)
In-Reply-To: <20181113130559.31221-1-heiko@sntech.de>

From: Heiko Stuebner <heiko.stuebner@bq.com>

The fact that OPPs specified only on cpu0 work is Linux specific and
normally cpu frequencies should be specified for each cpu core.
To facilitate this without needing to duplicate the frequency table
each time, convert to opp-v2 before adding references to all cores.

Signed-off-by: Heiko Stuebner <heiko.stuebner@bq.com>
---
 arch/arm/boot/dts/rk3188.dtsi | 55 ++++++++++++++++++++++++++++-------
 1 file changed, 44 insertions(+), 11 deletions(-)

diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index fd896b0a46e3..9d8c4c560e51 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -23,37 +23,70 @@
 			compatible = "arm,cortex-a9";
 			next-level-cache = <&L2>;
 			reg = <0x0>;
-			operating-points = <
-				/* kHz    uV */
-				1608000 1350000
-				1416000 1250000
-				1200000 1150000
-				1008000 1075000
-				 816000  975000
-				 600000  950000
-				 504000  925000
-				 312000  875000
-			>;
 			clock-latency = <40000>;
 			clocks = <&cru ARMCLK>;
+			operating-points-v2 = <&cpu0_opp_table>;
 		};
 		cpu at 1 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			next-level-cache = <&L2>;
 			reg = <0x1>;
+			operating-points-v2 = <&cpu0_opp_table>;
 		};
 		cpu at 2 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			next-level-cache = <&L2>;
 			reg = <0x2>;
+			operating-points-v2 = <&cpu0_opp_table>;
 		};
 		cpu at 3 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			next-level-cache = <&L2>;
 			reg = <0x3>;
+			operating-points-v2 = <&cpu0_opp_table>;
+		};
+	};
+
+	cpu0_opp_table: opp_table0 {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp-312000000 {
+			opp-hz = /bits/ 64 <312000000>;
+			opp-microvolt = <875000>;
+			clock-latency-ns = <40000>;
+		};
+		opp-504000000 {
+			opp-hz = /bits/ 64 <504000000>;
+			opp-microvolt = <925000>;
+		};
+		opp-600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <950000>;
+			opp-suspend;
+		};
+		opp-816000000 {
+			opp-hz = /bits/ 64 <816000000>;
+			opp-microvolt = <975000>;
+		};
+		opp-1008000000 {
+			opp-hz = /bits/ 64 <1008000000>;
+			opp-microvolt = <1075000>;
+		};
+		opp-1200000000 {
+			opp-hz = /bits/ 64 <1200000000>;
+			opp-microvolt = <1150000>;
+		};
+		opp-1416000000 {
+			opp-hz = /bits/ 64 <1416000000>;
+			opp-microvolt = <1250000>;
+		};
+		opp-1608000000 {
+			opp-hz = /bits/ 64 <1608000000>;
+			opp-microvolt = <1350000>;
 		};
 	};
 
-- 
2.18.0

  parent reply	other threads:[~2018-11-13 13:05 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-13 13:05 [PATCH 0/6] ARM: dts: rockchip: Add BQ Edison2 QuadCore tablet Heiko Stuebner
2018-11-13 13:05 ` Heiko Stuebner
2018-11-13 13:05 ` [PATCH 6/6] ARM: dts: rockchip: add BQ Edison 2 QC devicetree Heiko Stuebner
2018-11-13 13:05   ` Heiko Stuebner
     [not found]   ` <20181113130559.31221-7-heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
2018-12-04 20:21     ` Rob Herring
2018-12-04 20:21       ` Rob Herring
2018-12-06 13:20   ` Heiko Stuebner
2018-12-06 13:20     ` Heiko Stuebner
     [not found] ` <20181113130559.31221-1-heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
2018-11-13 13:05   ` [PATCH 1/6] ARM: dts: rockchip: add #sound-dai-cells to Cortex-A9 i2s Heiko Stuebner
2018-11-13 13:05     ` Heiko Stuebner
2018-11-13 13:05   ` Heiko Stuebner [this message]
2018-11-13 13:05     ` [PATCH 2/6] ARM: dts: rockchip: convert rk3188 to opp-v2 Heiko Stuebner
2018-11-13 13:05   ` [PATCH 3/6] ARM: dts: rockchip: add cpu-core resets for rk3188 Heiko Stuebner
2018-11-13 13:05     ` Heiko Stuebner
2018-11-13 13:05   ` [PATCH 4/6] ARM: dts: rockchip: add phandles to secondary cpu cores Heiko Stuebner
2018-11-13 13:05     ` Heiko Stuebner
2018-11-13 13:05   ` [PATCH 5/6] ARM: dts: rockchip: update cpu supplies on rk3188 Heiko Stuebner
2018-11-13 13:05     ` Heiko Stuebner
2018-11-27 14:14   ` [PATCH 0/6] ARM: dts: rockchip: Add BQ Edison2 QuadCore tablet Heiko Stuebner
2018-11-27 14:14     ` Heiko Stuebner

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