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From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Gregory Clement <gregory.clement@bootlin.com>,
	Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Bjorn Helgaas <bhelgaas@google.com>
Cc: <devicetree@vger.kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	linux-pci@vger.kernel.org, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	Antoine Tenart <antoine.tenart@bootlin.com>,
	Maxime Chevallier <maxime.chevallier@bootlin.com>,
	Nadav Haklai <nadavh@marvell.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>
Subject: [PATCH 03/12] PCI: aardvark: add PHY support
Date: Fri, 23 Nov 2018 15:18:22 +0100	[thread overview]
Message-ID: <20181123141831.8214-4-miquel.raynal@bootlin.com> (raw)
In-Reply-To: <20181123141831.8214-1-miquel.raynal@bootlin.com>

The IP needs its PHY to be properly configured to work. While the PHY
is usually already configured by the bootloader, we will need this
feature when adding S2RAM support. Take care of registering and
configuring the PHY from the driver itself.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/pci/controller/pci-aardvark.c | 62 +++++++++++++++++++++++++++
 1 file changed, 62 insertions(+)

diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
index 1d31d74ddab7..da695572a2ed 100644
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -17,6 +17,7 @@
 #include <linux/pci.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
+#include <linux/phy/phy.h>
 #include <linux/of_address.h>
 #include <linux/of_gpio.h>
 #include <linux/of_pci.h>
@@ -204,6 +205,7 @@ struct advk_pcie {
 	int root_bus_nr;
 	struct pci_bridge_emul bridge;
 	struct gpio_desc *reset_gpio;
+	struct phy *phy;
 };
 
 static inline void advk_writel(struct advk_pcie *pcie, u32 val, u64 reg)
@@ -1025,6 +1027,62 @@ static int advk_pcie_setup_reset_gpio(struct advk_pcie *pcie)
 	return 0;
 }
 
+static void advk_pcie_disable_phy(struct advk_pcie *pcie)
+{
+	phy_power_off(pcie->phy);
+	phy_exit(pcie->phy);
+}
+
+static int advk_pcie_enable_phy(struct advk_pcie *pcie)
+{
+	int ret;
+
+	if (!pcie->phy)
+		return 0;
+
+	ret = phy_init(pcie->phy);
+	if (ret)
+		return ret;
+
+	ret = phy_set_mode(pcie->phy, PHY_MODE_PCIE);
+	if (ret) {
+		phy_exit(pcie->phy);
+		return ret;
+	}
+
+	ret = phy_power_on(pcie->phy);
+	if (ret) {
+		phy_exit(pcie->phy);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int advk_pcie_setup_phy(struct advk_pcie *pcie)
+{
+	struct device *dev = &pcie->pdev->dev;
+	struct device_node *node = dev->of_node;
+	int ret = 0;
+
+	pcie->phy = devm_of_phy_get(dev, node, NULL);
+	if (IS_ERR(pcie->phy) && (PTR_ERR(pcie->phy) == -EPROBE_DEFER))
+		return PTR_ERR(pcie->phy);
+
+	/* Old bindings miss the PHY handle */
+	if (IS_ERR(pcie->phy)) {
+		dev_warn(dev, "PHY unavailable (%ld)\n", PTR_ERR(pcie->phy));
+		pcie->phy = NULL;
+		return 0;
+	}
+
+	ret = advk_pcie_enable_phy(pcie);
+	if (ret)
+		dev_err(dev, "Failed to initialize PHY (%d)\n", ret);
+
+	return ret;
+}
+
 static int advk_pcie_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
@@ -1060,6 +1118,10 @@ static int advk_pcie_probe(struct platform_device *pdev)
 		return ret;
 	}
 
+	ret = advk_pcie_setup_phy(pcie);
+	if (ret)
+		return ret;
+
 	ret = advk_pcie_setup_reset_gpio(pcie);
 	if (ret)
 		return ret;
-- 
2.19.1


WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Gregory Clement <gregory.clement@bootlin.com>,
	Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Bjorn Helgaas <bhelgaas@google.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Antoine Tenart <antoine.tenart@bootlin.com>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	Maxime Chevallier <maxime.chevallier@bootlin.com>,
	Nadav Haklai <nadavh@marvell.com>,
	Rob Herring <robh+dt@kernel.org>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH 03/12] PCI: aardvark: add PHY support
Date: Fri, 23 Nov 2018 15:18:22 +0100	[thread overview]
Message-ID: <20181123141831.8214-4-miquel.raynal@bootlin.com> (raw)
In-Reply-To: <20181123141831.8214-1-miquel.raynal@bootlin.com>

The IP needs its PHY to be properly configured to work. While the PHY
is usually already configured by the bootloader, we will need this
feature when adding S2RAM support. Take care of registering and
configuring the PHY from the driver itself.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/pci/controller/pci-aardvark.c | 62 +++++++++++++++++++++++++++
 1 file changed, 62 insertions(+)

diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
index 1d31d74ddab7..da695572a2ed 100644
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -17,6 +17,7 @@
 #include <linux/pci.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
+#include <linux/phy/phy.h>
 #include <linux/of_address.h>
 #include <linux/of_gpio.h>
 #include <linux/of_pci.h>
@@ -204,6 +205,7 @@ struct advk_pcie {
 	int root_bus_nr;
 	struct pci_bridge_emul bridge;
 	struct gpio_desc *reset_gpio;
+	struct phy *phy;
 };
 
 static inline void advk_writel(struct advk_pcie *pcie, u32 val, u64 reg)
@@ -1025,6 +1027,62 @@ static int advk_pcie_setup_reset_gpio(struct advk_pcie *pcie)
 	return 0;
 }
 
+static void advk_pcie_disable_phy(struct advk_pcie *pcie)
+{
+	phy_power_off(pcie->phy);
+	phy_exit(pcie->phy);
+}
+
+static int advk_pcie_enable_phy(struct advk_pcie *pcie)
+{
+	int ret;
+
+	if (!pcie->phy)
+		return 0;
+
+	ret = phy_init(pcie->phy);
+	if (ret)
+		return ret;
+
+	ret = phy_set_mode(pcie->phy, PHY_MODE_PCIE);
+	if (ret) {
+		phy_exit(pcie->phy);
+		return ret;
+	}
+
+	ret = phy_power_on(pcie->phy);
+	if (ret) {
+		phy_exit(pcie->phy);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int advk_pcie_setup_phy(struct advk_pcie *pcie)
+{
+	struct device *dev = &pcie->pdev->dev;
+	struct device_node *node = dev->of_node;
+	int ret = 0;
+
+	pcie->phy = devm_of_phy_get(dev, node, NULL);
+	if (IS_ERR(pcie->phy) && (PTR_ERR(pcie->phy) == -EPROBE_DEFER))
+		return PTR_ERR(pcie->phy);
+
+	/* Old bindings miss the PHY handle */
+	if (IS_ERR(pcie->phy)) {
+		dev_warn(dev, "PHY unavailable (%ld)\n", PTR_ERR(pcie->phy));
+		pcie->phy = NULL;
+		return 0;
+	}
+
+	ret = advk_pcie_enable_phy(pcie);
+	if (ret)
+		dev_err(dev, "Failed to initialize PHY (%d)\n", ret);
+
+	return ret;
+}
+
 static int advk_pcie_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
@@ -1060,6 +1118,10 @@ static int advk_pcie_probe(struct platform_device *pdev)
 		return ret;
 	}
 
+	ret = advk_pcie_setup_phy(pcie);
+	if (ret)
+		return ret;
+
 	ret = advk_pcie_setup_reset_gpio(pcie);
 	if (ret)
 		return ret;
-- 
2.19.1

WARNING: multiple messages have this Message-ID (diff)
From: miquel.raynal@bootlin.com (Miquel Raynal)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 03/12] PCI: aardvark: add PHY support
Date: Fri, 23 Nov 2018 15:18:22 +0100	[thread overview]
Message-ID: <20181123141831.8214-4-miquel.raynal@bootlin.com> (raw)
In-Reply-To: <20181123141831.8214-1-miquel.raynal@bootlin.com>

The IP needs its PHY to be properly configured to work. While the PHY
is usually already configured by the bootloader, we will need this
feature when adding S2RAM support. Take care of registering and
configuring the PHY from the driver itself.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/pci/controller/pci-aardvark.c | 62 +++++++++++++++++++++++++++
 1 file changed, 62 insertions(+)

diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
index 1d31d74ddab7..da695572a2ed 100644
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -17,6 +17,7 @@
 #include <linux/pci.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
+#include <linux/phy/phy.h>
 #include <linux/of_address.h>
 #include <linux/of_gpio.h>
 #include <linux/of_pci.h>
@@ -204,6 +205,7 @@ struct advk_pcie {
 	int root_bus_nr;
 	struct pci_bridge_emul bridge;
 	struct gpio_desc *reset_gpio;
+	struct phy *phy;
 };
 
 static inline void advk_writel(struct advk_pcie *pcie, u32 val, u64 reg)
@@ -1025,6 +1027,62 @@ static int advk_pcie_setup_reset_gpio(struct advk_pcie *pcie)
 	return 0;
 }
 
+static void advk_pcie_disable_phy(struct advk_pcie *pcie)
+{
+	phy_power_off(pcie->phy);
+	phy_exit(pcie->phy);
+}
+
+static int advk_pcie_enable_phy(struct advk_pcie *pcie)
+{
+	int ret;
+
+	if (!pcie->phy)
+		return 0;
+
+	ret = phy_init(pcie->phy);
+	if (ret)
+		return ret;
+
+	ret = phy_set_mode(pcie->phy, PHY_MODE_PCIE);
+	if (ret) {
+		phy_exit(pcie->phy);
+		return ret;
+	}
+
+	ret = phy_power_on(pcie->phy);
+	if (ret) {
+		phy_exit(pcie->phy);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int advk_pcie_setup_phy(struct advk_pcie *pcie)
+{
+	struct device *dev = &pcie->pdev->dev;
+	struct device_node *node = dev->of_node;
+	int ret = 0;
+
+	pcie->phy = devm_of_phy_get(dev, node, NULL);
+	if (IS_ERR(pcie->phy) && (PTR_ERR(pcie->phy) == -EPROBE_DEFER))
+		return PTR_ERR(pcie->phy);
+
+	/* Old bindings miss the PHY handle */
+	if (IS_ERR(pcie->phy)) {
+		dev_warn(dev, "PHY unavailable (%ld)\n", PTR_ERR(pcie->phy));
+		pcie->phy = NULL;
+		return 0;
+	}
+
+	ret = advk_pcie_enable_phy(pcie);
+	if (ret)
+		dev_err(dev, "Failed to initialize PHY (%d)\n", ret);
+
+	return ret;
+}
+
 static int advk_pcie_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
@@ -1060,6 +1118,10 @@ static int advk_pcie_probe(struct platform_device *pdev)
 		return ret;
 	}
 
+	ret = advk_pcie_setup_phy(pcie);
+	if (ret)
+		return ret;
+
 	ret = advk_pcie_setup_reset_gpio(pcie);
 	if (ret)
 		return ret;
-- 
2.19.1

  parent reply	other threads:[~2018-11-23 14:19 UTC|newest]

Thread overview: 88+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-23 14:18 [PATCH 00/12] Bring suspend to RAM support to PCIe Aardvark driver Miquel Raynal
2018-11-23 14:18 ` Miquel Raynal
2018-11-23 14:18 ` Miquel Raynal
2018-11-23 14:18 ` [PATCH 01/12] PCI: aardvark: configure more registers in the configuration helper Miquel Raynal
2018-11-23 14:18   ` Miquel Raynal
2018-11-23 14:18   ` Miquel Raynal
2018-11-23 14:18 ` [PATCH 02/12] PCI: aardvark: add reset GPIO support Miquel Raynal
2018-11-23 14:18   ` Miquel Raynal
2018-11-23 14:18   ` Miquel Raynal
2018-11-23 14:18 ` Miquel Raynal [this message]
2018-11-23 14:18   ` [PATCH 03/12] PCI: aardvark: add PHY support Miquel Raynal
2018-11-23 14:18   ` Miquel Raynal
2018-11-23 14:18 ` [PATCH 04/12] PCI: aardvark: add clock support Miquel Raynal
2018-11-23 14:18   ` Miquel Raynal
2018-11-23 14:18   ` Miquel Raynal
2018-11-23 14:18 ` [PATCH 05/12] PCI: aardvark: add suspend to RAM support Miquel Raynal
2018-11-23 14:18   ` Miquel Raynal
2018-11-23 14:18   ` Miquel Raynal
2018-12-03 10:27   ` Lorenzo Pieralisi
2018-12-03 10:27     ` Lorenzo Pieralisi
2018-12-03 15:38     ` Miquel Raynal
2018-12-03 15:38       ` Miquel Raynal
2018-12-03 17:18       ` Lorenzo Pieralisi
2018-12-03 17:18         ` Lorenzo Pieralisi
2018-12-03 19:19         ` Stephen Boyd
2018-12-03 19:19           ` Stephen Boyd
2018-12-03 22:00       ` Rafael J. Wysocki
2018-12-03 22:00         ` Rafael J. Wysocki
2018-12-03 22:18         ` Miquel Raynal
2018-12-03 22:18           ` Miquel Raynal
2018-12-04  9:45         ` Lorenzo Pieralisi
2018-12-04  9:45           ` Lorenzo Pieralisi
2018-12-04 21:42           ` Rafael J. Wysocki
2018-12-04 21:42             ` Rafael J. Wysocki
2018-12-05 11:00             ` Lorenzo Pieralisi
2018-12-05 11:00               ` Lorenzo Pieralisi
2018-12-11 14:16             ` Lorenzo Pieralisi
2018-12-11 14:16               ` Lorenzo Pieralisi
2018-12-13  9:00               ` Stephen Boyd
2018-12-13  9:00                 ` Stephen Boyd
2018-12-13 10:53                 ` Lorenzo Pieralisi
2018-12-13 10:53                   ` Lorenzo Pieralisi
2018-12-13 14:30                   ` Miquel Raynal
2018-12-13 14:30                     ` Miquel Raynal
2018-12-13 14:52                     ` Lorenzo Pieralisi
2018-12-13 14:52                       ` Lorenzo Pieralisi
2018-12-13 21:50                     ` Rafael J. Wysocki
2018-12-13 21:50                       ` Rafael J. Wysocki
2018-12-17 14:54                       ` Miquel Raynal
2018-12-17 14:54                         ` Miquel Raynal
2018-12-18 10:54                         ` Rafael J. Wysocki
2018-12-18 10:54                           ` Rafael J. Wysocki
2018-12-18 14:14                           ` Miquel Raynal
2018-12-18 14:14                             ` Miquel Raynal
2018-11-23 14:18 ` [PATCH 06/12] dt-bindings: PCI: aardvark: describe the reset-gpios property Miquel Raynal
2018-11-23 14:18   ` Miquel Raynal
2018-11-23 14:18   ` Miquel Raynal
2018-12-11 21:44   ` Rob Herring
2018-12-11 21:44     ` Rob Herring
2018-12-11 21:44     ` Rob Herring
2018-11-23 14:18 ` [PATCH 07/12] dt-bindings: PCI: aardvark: describe the clocks property Miquel Raynal
2018-11-23 14:18   ` Miquel Raynal
2018-11-23 14:18   ` Miquel Raynal
2018-12-11 21:44   ` Rob Herring
2018-12-11 21:44     ` Rob Herring
2018-12-11 21:44     ` Rob Herring
2018-11-23 14:18 ` [PATCH 08/12] dt-bindings: PCI: aardvark: describe the PHY property Miquel Raynal
2018-11-23 14:18   ` Miquel Raynal
2018-11-23 14:18   ` Miquel Raynal
2018-12-11 21:44   ` Rob Herring
2018-12-11 21:44     ` Rob Herring
2018-12-11 21:44     ` Rob Herring
2018-11-23 14:18 ` [PATCH 09/12] ARM64: dts: marvell: armada-37xx: declare PCIe reset pin Miquel Raynal
2018-11-23 14:18   ` Miquel Raynal
2018-11-23 14:18   ` Miquel Raynal
2018-11-23 14:18 ` [PATCH 10/12] ARM64: dts: marvell: armada-3720-espressobin: declare PCIe reset GPIO Miquel Raynal
2018-11-23 14:18   ` Miquel Raynal
2018-11-23 14:18   ` Miquel Raynal
2018-11-23 14:18 ` [PATCH 11/12] ARM64: dts: marvell: armada-37xx: declare PCIe clock Miquel Raynal
2018-11-23 14:18   ` Miquel Raynal
2018-11-23 14:18   ` Miquel Raynal
2018-11-23 14:18 ` [PATCH 12/12] ARM64: dts: marvell: armada-3720-espressobin: declare PCIe PHY Miquel Raynal
2018-11-23 14:18   ` Miquel Raynal
2018-11-23 14:18   ` Miquel Raynal
2018-11-26 14:50 ` [PATCH 00/12] Bring suspend to RAM support to PCIe Aardvark driver Bjorn Helgaas
2018-11-26 14:50   ` Bjorn Helgaas
2018-11-30 13:12   ` Miquel Raynal
2018-11-30 13:12     ` Miquel Raynal

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