All of lore.kernel.org
 help / color / mirror / Atom feed
From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: "José Roberto de Souza" <jose.souza@intel.com>,
	"Dhinakaran Pandiyan" <dhinakaran.pandiyan@intel.com>,
	dri-devel@lists.freedesktop.org,
	"Rodrigo Vivi" <rodrigo.vivi@intel.com>
Subject: [PATCH v2 07/11] drm/i915/psr: Check if resolution is supported by default SU granularity
Date: Thu, 29 Nov 2018 18:25:21 -0800	[thread overview]
Message-ID: <20181130022525.25676-7-jose.souza@intel.com> (raw)
In-Reply-To: <20181130022525.25676-1-jose.souza@intel.com>

Selective updates have a default granularity requirements as stated
by eDP spec, so check if HW can match those requirements before
enable PSR2.

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_psr.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index c4a8f476eea9..282ff1bc68a7 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -539,6 +539,18 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
 		return false;
 	}
 
+	/* HW will always send full lines in SU blocks, so X will
+	 * always be 0 and we only need to check the width to validate
+	 * horizontal granularity.
+	 * About vertical granularity HW works by SU blocks starting
+	 * at each 4 lines with height of 4 lines, what eDP states
+	 * that sink should support.
+	 */
+	if (crtc_hdisplay % 4) {
+		DRM_DEBUG_KMS("PSR2 not enabled, default SU granularity not match\n");
+		return false;
+	}
+
 	return true;
 }
 
-- 
2.19.2

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

  parent reply	other threads:[~2018-11-30  2:25 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-30  2:25 [PATCH v2 01/11] drm/i915: Disable PSR in Apple panels José Roberto de Souza
2018-11-30  2:25 ` [PATCH v2 02/11] drm/i915/psr: Don't tell sink that main link will be active while is active PSR2 José Roberto de Souza
2018-11-30 23:42   ` Dhinakaran Pandiyan
2018-11-30  2:25 ` [PATCH v2 03/11] drm/i915/psr: Set PSR CRC verification bit in sink inside PSR1 block José Roberto de Souza
2018-11-30 23:54   ` Dhinakaran Pandiyan
2018-12-03 20:24     ` Souza, Jose
2018-11-30  2:25 ` [PATCH v2 04/11] drm/i915/psr: Enable sink to trigger a interruption on PSR2 CRC mismatch José Roberto de Souza
2018-12-01  0:00   ` Dhinakaran Pandiyan
2018-11-30  2:25 ` [PATCH v2 05/11] drm/i915/icl: Do not change reserved registers related to PSR2 José Roberto de Souza
2018-11-30  2:25 ` [PATCH v2 06/11] drm: Add the PSR SU granularity registers offsets José Roberto de Souza
2018-12-01  0:13   ` Dhinakaran Pandiyan
2018-11-30  2:25 ` José Roberto de Souza [this message]
2018-12-01  0:37   ` [PATCH v2 07/11] drm/i915/psr: Check if resolution is supported by default SU granularity Dhinakaran Pandiyan
2018-12-03 20:40     ` Souza, Jose
2018-11-30  2:25 ` [PATCH v2 08/11] drm/i915/psr: Check if source supports sink specific " José Roberto de Souza
2018-12-03 20:59   ` Dhinakaran Pandiyan
2018-12-03 22:45     ` Souza, Jose
2018-12-03 23:12       ` Pandiyan, Dhinakaran
2018-12-03 23:18         ` Souza, Jose
2018-11-30  2:25 ` [PATCH v2 09/11] drm/i915: Remove old PSR2 FIXME about frontbuffer tracking José Roberto de Souza
2018-11-30  2:25 ` [PATCH v2 10/11] drm/i915: Improve PSR2 CTL macros José Roberto de Souza
2018-12-03 23:03   ` Dhinakaran Pandiyan
2018-12-03 23:10     ` Rodrigo Vivi
2018-11-30  2:25 ` [PATCH v2 11/11] drm/i915/psr: Set the right frames values José Roberto de Souza
2018-11-30  2:37 ` ✗ Fi.CI.SPARSE: warning for series starting with [v2,01/11] drm/i915: Disable PSR in Apple panels Patchwork
2018-11-30  2:55 ` ✓ Fi.CI.BAT: success " Patchwork
2018-11-30 20:53 ` ✓ Fi.CI.IGT: " Patchwork
2018-11-30 23:35 ` [PATCH v2 01/11] " Dhinakaran Pandiyan
2018-12-03 20:14   ` Souza, Jose
2018-12-03 22:45     ` Dhinakaran Pandiyan
2018-12-03 22:53       ` Souza, Jose
2018-12-03 20:40   ` Dhinakaran Pandiyan
2018-12-03 12:04 ` Jani Nikula

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20181130022525.25676-7-jose.souza@intel.com \
    --to=jose.souza@intel.com \
    --cc=dhinakaran.pandiyan@intel.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=rodrigo.vivi@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.