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From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Subject: [PATCH v4 4/9] drm/i915/psr: Enable sink to trigger a interruption on PSR2 CRC mismatch
Date: Mon,  3 Dec 2018 16:33:58 -0800	[thread overview]
Message-ID: <20181204003403.23361-4-jose.souza@intel.com> (raw)
In-Reply-To: <20181204003403.23361-1-jose.souza@intel.com>

eDP spec states 2 different bits to enable sink to trigger a
interruption when there is a CRC mismatch.
DP_PSR_CRC_VERIFICATION is for PSR only and
DP_PSR_IRQ_HPD_WITH_CRC_ERRORS is for PSR2 only.

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_psr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 8342c33ede04..e463bef3c804 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -394,7 +394,7 @@ static void intel_psr_enable_sink(struct intel_dp *intel_dp)
 	if (dev_priv->psr.psr2_enabled) {
 		drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG,
 				   DP_ALPM_ENABLE);
-		dpcd_val |= DP_PSR_ENABLE_PSR2;
+		dpcd_val |= DP_PSR_ENABLE_PSR2 | DP_PSR_IRQ_HPD_WITH_CRC_ERRORS;
 	} else {
 		if (dev_priv->psr.link_standby)
 			dpcd_val |= DP_PSR_MAIN_LINK_ACTIVE;
-- 
2.19.2

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  parent reply	other threads:[~2018-12-04  0:34 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-04  0:33 [PATCH v4 1/9] drm/i915: Disable PSR in Apple panels José Roberto de Souza
2018-12-04  0:33 ` [PATCH v4 2/9] drm/i915/psr: Don't tell sink that main link will be active while is active PSR2 José Roberto de Souza
2018-12-04  0:33 ` [PATCH v4 3/9] drm/i915/psr: Set PSR CRC verification bit in sink inside PSR1 block José Roberto de Souza
2018-12-04  0:33 ` José Roberto de Souza [this message]
2018-12-04  0:33 ` [PATCH v4 5/9] drm/i915/icl: Do not change reserved registers related to PSR2 José Roberto de Souza
2018-12-04  0:34 ` [PATCH v4 6/9] drm/i915: Remove old PSR2 FIXME about frontbuffer tracking José Roberto de Souza
2018-12-04  0:34 ` [PATCH v4 7/9] drm: Add the PSR SU granularity registers offsets José Roberto de Souza
2018-12-04  0:34 ` [PATCH v4 8/9] drm/i915/psr: Check if resolution is supported by default SU granularity José Roberto de Souza
2018-12-04  0:34 ` [PATCH v4 9/9] drm/i915/psr: Check if source supports sink specific " José Roberto de Souza
2018-12-04 20:02   ` Dhinakaran Pandiyan
2018-12-04 20:11     ` Souza, Jose
2018-12-04  0:51 ` ✗ Fi.CI.SPARSE: warning for series starting with [v4,1/9] drm/i915: Disable PSR in Apple panels Patchwork
2018-12-04  1:04 ` ✓ Fi.CI.BAT: success " Patchwork
2018-12-04  3:05 ` ✓ Fi.CI.IGT: " Patchwork
2018-12-04 20:46   ` Souza, Jose

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