From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v4 6/9] drm/i915: Remove old PSR2 FIXME about frontbuffer tracking
Date: Mon, 3 Dec 2018 16:34:00 -0800 [thread overview]
Message-ID: <20181204003403.23361-6-jose.souza@intel.com> (raw)
In-Reply-To: <20181204003403.23361-1-jose.souza@intel.com>
Our frontbuffer tracking improved over the years + the WA #0884
helped us keep PSR2 enabled while triggering screen updates when
necessary so this FIXME is not valid anymore.
Acked-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/intel_psr.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index b513a15d60e1..11b038ba96ec 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -476,9 +476,6 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
idle_frames = max(idle_frames, dev_priv->psr.sink_sync_latency + 1);
val = idle_frames << EDP_PSR2_IDLE_FRAME_SHIFT;
- /* FIXME: selective update is probably totally broken because it doesn't
- * mesh at all with our frontbuffer tracking. And the hw alone isn't
- * good enough. */
val |= EDP_PSR2_ENABLE | EDP_SU_TRACK_ENABLE;
if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
val |= EDP_Y_COORDINATE_ENABLE;
--
2.19.2
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next prev parent reply other threads:[~2018-12-04 0:34 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-04 0:33 [PATCH v4 1/9] drm/i915: Disable PSR in Apple panels José Roberto de Souza
2018-12-04 0:33 ` [PATCH v4 2/9] drm/i915/psr: Don't tell sink that main link will be active while is active PSR2 José Roberto de Souza
2018-12-04 0:33 ` [PATCH v4 3/9] drm/i915/psr: Set PSR CRC verification bit in sink inside PSR1 block José Roberto de Souza
2018-12-04 0:33 ` [PATCH v4 4/9] drm/i915/psr: Enable sink to trigger a interruption on PSR2 CRC mismatch José Roberto de Souza
2018-12-04 0:33 ` [PATCH v4 5/9] drm/i915/icl: Do not change reserved registers related to PSR2 José Roberto de Souza
2018-12-04 0:34 ` José Roberto de Souza [this message]
2018-12-04 0:34 ` [PATCH v4 7/9] drm: Add the PSR SU granularity registers offsets José Roberto de Souza
2018-12-04 0:34 ` [PATCH v4 8/9] drm/i915/psr: Check if resolution is supported by default SU granularity José Roberto de Souza
2018-12-04 0:34 ` [PATCH v4 9/9] drm/i915/psr: Check if source supports sink specific " José Roberto de Souza
2018-12-04 20:02 ` Dhinakaran Pandiyan
2018-12-04 20:11 ` Souza, Jose
2018-12-04 0:51 ` ✗ Fi.CI.SPARSE: warning for series starting with [v4,1/9] drm/i915: Disable PSR in Apple panels Patchwork
2018-12-04 1:04 ` ✓ Fi.CI.BAT: success " Patchwork
2018-12-04 3:05 ` ✓ Fi.CI.IGT: " Patchwork
2018-12-04 20:46 ` Souza, Jose
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