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From: Bob Paauwe <bob.j.paauwe@intel.com>
To: intel-gfx <intel-gfx@lists.freedesktop.org>
Subject: [PATCH] drm/i915: DFSM pipe disable is valid from gen9 onwards (v2)
Date: Tue, 11 Dec 2018 11:25:45 -0800	[thread overview]
Message-ID: <20181211192545.140081-1-bob.j.paauwe@intel.com> (raw)
In-Reply-To: <20181211173043.137972-1-bob.j.paauwe@intel.com>

It's not just GEN9 platforms that allow for pipes to be disabled via
the DFSM register, but all later platforms as well.

v2: drop pointless parentheses (Ville)

Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com>
---
 drivers/gpu/drm/i915/intel_device_info.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 1e56319334f3..bd5c4d62c635 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -811,7 +811,7 @@ void intel_device_info_runtime_init(struct intel_device_info *info)
 			DRM_INFO("PipeC fused off\n");
 			info->num_pipes -= 1;
 		}
-	} else if (HAS_DISPLAY(dev_priv) && IS_GEN9(dev_priv)) {
+	} else if (HAS_DISPLAY(dev_priv) && INTEL_GEN(dev_priv) >= 9) {
 		u32 dfsm = I915_READ(SKL_DFSM);
 		u8 disabled_mask = 0;
 		bool invalid;
-- 
2.17.1

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  parent reply	other threads:[~2018-12-11 19:25 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-11 17:30 [PATCH] drm/i915: DFSM pipe disable is valid from gen9 onwards Bob Paauwe
2018-12-11 17:45 ` Ville Syrjälä
2018-12-11 17:53 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-12-11 19:25 ` Bob Paauwe [this message]
2018-12-12  0:28   ` [PATCH] drm/i915: DFSM pipe disable is valid from gen9 onwards (v2) Matt Roper
2018-12-11 19:41 ` ✓ Fi.CI.IGT: success for drm/i915: DFSM pipe disable is valid from gen9 onwards Patchwork
2018-12-11 19:51 ` ✓ Fi.CI.BAT: success for drm/i915: DFSM pipe disable is valid from gen9 onwards (rev2) Patchwork
2018-12-12  0:51 ` ✓ Fi.CI.IGT: " Patchwork

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