From: Miquel Raynal <miquel.raynal@bootlin.com> To: Gregory Clement <gregory.clement@bootlin.com>, Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>, Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>, Zhang Rui <rui.zhang@intel.com>, Eduardo Valentin <edubezval@gmail.com>, Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com>, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, Antoine Tenart <antoine.tenart@bootlin.com>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will.deacon@arm.com>, Russell King <linux@armlinux.org.uk>, Maxime Chevallier <maxime.chevallier@bootlin.com>, Nadav Haklai <nadavh@marvell.com>, Marc Zyngier <marc.zyngier@arm.com>, David Sniatkiwicz <davidsn@marvell.com>, Rob Herring <robh+dt@kernel.org>, Thomas Petazzoni <thomas.petazzoni@bootlin.com>, Miquel Raynal <miquel.raynal@bootlin.com>, linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 3/6] dt-bindings: ap806: document the thermal interrupt capabilities Date: Wed, 12 Dec 2018 10:36:42 +0100 [thread overview] Message-ID: <20181212093645.14752-4-miquel.raynal@bootlin.com> (raw) In-Reply-To: <20181212093645.14752-1-miquel.raynal@bootlin.com> The thermal IP can produce interrupts on overheat situation. Describe them. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> --- .../bindings/arm/marvell/ap806-system-controller.txt | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt index 3fd21bb7cb37..7b8b8eb0191f 100644 --- a/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt +++ b/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt @@ -114,12 +114,17 @@ Documentation/devicetree/bindings/thermal/thermal.txt The thermal IP can probe the temperature all around the processor. It may feature several channels, each of them wired to one sensor. +It is possible to setup an overheat interrupt by giving at least one +critical point to any subnode of the thermal-zone node. + Required properties: - compatible: must be one of: * marvell,armada-ap806-thermal - reg: register range associated with the thermal functions. Optional properties: +- interrupts: overheat interrupt handle. Should point to line 18 of the + SEI irqchip. See interrupt-controller/interrupts.txt - #thermal-sensor-cells: shall be <1> when thermal-zones subnodes refer to this IP and represents the channel ID. There is one sensor per channel. O refers to the thermal IP internal channel, while positive @@ -133,6 +138,8 @@ ap_syscon1: system-controller@6f8000 { ap_thermal: thermal-sensor@80 { compatible = "marvell,armada-ap806-thermal"; reg = <0x80 0x10>; + interrupt-parent = <&sei>; + interrupts = <18>; #thermal-sensor-cells = <1>; }; }; -- 2.19.1
WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com> To: Gregory Clement <gregory.clement@bootlin.com>, Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>, Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>, Zhang Rui <rui.zhang@intel.com>, Eduardo Valentin <edubezval@gmail.com>, Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com>, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, Antoine Tenart <antoine.tenart@bootlin.com>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will.deacon@arm.com>, Russell King <linux@armlinux.org.uk>, Maxime Chevallier <maxime.chevallier@bootlin.com>, Nadav Haklai <nadavh@marvell.com>, Marc Zyngier <marc.zyngier@arm.com>, David Sniatkiwicz <davidsn@marvell.com>, Rob Herring <robh+dt@kernel.org>, Thomas Petazzoni <thomas.petazzoni@bootlin.com>, Miquel Raynal <miquel.raynal@bootlin.com>, linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 3/6] dt-bindings: ap806: document the thermal interrupt capabilities Date: Wed, 12 Dec 2018 10:36:42 +0100 [thread overview] Message-ID: <20181212093645.14752-4-miquel.raynal@bootlin.com> (raw) In-Reply-To: <20181212093645.14752-1-miquel.raynal@bootlin.com> The thermal IP can produce interrupts on overheat situation. Describe them. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> --- .../bindings/arm/marvell/ap806-system-controller.txt | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt index 3fd21bb7cb37..7b8b8eb0191f 100644 --- a/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt +++ b/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt @@ -114,12 +114,17 @@ Documentation/devicetree/bindings/thermal/thermal.txt The thermal IP can probe the temperature all around the processor. It may feature several channels, each of them wired to one sensor. +It is possible to setup an overheat interrupt by giving at least one +critical point to any subnode of the thermal-zone node. + Required properties: - compatible: must be one of: * marvell,armada-ap806-thermal - reg: register range associated with the thermal functions. Optional properties: +- interrupts: overheat interrupt handle. Should point to line 18 of the + SEI irqchip. See interrupt-controller/interrupts.txt - #thermal-sensor-cells: shall be <1> when thermal-zones subnodes refer to this IP and represents the channel ID. There is one sensor per channel. O refers to the thermal IP internal channel, while positive @@ -133,6 +138,8 @@ ap_syscon1: system-controller@6f8000 { ap_thermal: thermal-sensor@80 { compatible = "marvell,armada-ap806-thermal"; reg = <0x80 0x10>; + interrupt-parent = <&sei>; + interrupts = <18>; #thermal-sensor-cells = <1>; }; }; -- 2.19.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2018-12-12 9:36 UTC|newest] Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-12-12 9:36 [PATCH v4 0/6] Add hw overheat IRQ support to Marvell thermal driver Miquel Raynal 2018-12-12 9:36 ` [PATCH v4 1/6] thermal: armada: add overheat interrupt support Miquel Raynal 2018-12-12 9:36 ` [PATCH v4 2/6] MAINTAINERS: thermal: add entry for Marvell MVEBU thermal driver Miquel Raynal 2018-12-12 9:36 ` Miquel Raynal 2018-12-12 9:36 ` Miquel Raynal [this message] 2018-12-12 9:36 ` [PATCH v4 3/6] dt-bindings: ap806: document the thermal interrupt capabilities Miquel Raynal 2018-12-17 21:45 ` Rob Herring 2018-12-17 21:45 ` Rob Herring 2018-12-12 9:36 ` [PATCH v4 4/6] dt-bindings: cp110: " Miquel Raynal 2018-12-12 9:36 ` Miquel Raynal 2018-12-12 9:36 ` [PATCH v4 5/6] arm64: dts: marvell: add interrupt support to ap806 thermal node Miquel Raynal 2018-12-12 9:36 ` Miquel Raynal 2018-12-12 9:36 ` [PATCH v4 6/6] arm64: dts: marvell: add interrupt support to cp110 " Miquel Raynal 2018-12-12 9:36 ` Miquel Raynal 2018-12-15 17:25 ` [PATCH v4 0/6] Add hw overheat IRQ support to Marvell thermal driver Eduardo Valentin 2018-12-15 17:25 ` Eduardo Valentin 2019-02-06 9:25 ` Gregory CLEMENT 2019-02-06 9:25 ` Gregory CLEMENT
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