From: Bjorn Andersson <bjorn.andersson@linaro.org>
To: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>
Cc: Andy Gross <andy.gross@linaro.org>,
Bjorn Helgaas <bhelgaas@google.com>,
David Brown <david.brown@linaro.org>,
Khasim Syed Mohammed <khasim.mohammed@linaro.org>,
Kishon Vijay Abraham I <kishon@ti.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Niklas Cassel <niklas.cassel@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Stanimir Varbanov <svarbanov@mm-sol.com>,
devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org
Subject: [PATCH 1/7] clk: gcc-qcs404: Add PCIe resets
Date: Fri, 25 Jan 2019 15:45:03 -0800 [thread overview]
Message-ID: <20190125234509.26419-2-bjorn.andersson@linaro.org> (raw)
In-Reply-To: <20190125234509.26419-1-bjorn.andersson@linaro.org>
Enabling PCIe requires several of the PCIe related resets from GCC, so
add them all.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
Stephen, I suggest that we merge this patch through Andy's devicetree branch,
together with the DT patch in the end of this series.
drivers/clk/qcom/gcc-qcs404.c | 7 +++++++
include/dt-bindings/clock/qcom,gcc-qcs404.h | 7 +++++++
2 files changed, 14 insertions(+)
diff --git a/drivers/clk/qcom/gcc-qcs404.c b/drivers/clk/qcom/gcc-qcs404.c
index 64da032bb9ed..cfb8789ff706 100644
--- a/drivers/clk/qcom/gcc-qcs404.c
+++ b/drivers/clk/qcom/gcc-qcs404.c
@@ -2675,6 +2675,13 @@ static const struct qcom_reset_map gcc_qcs404_resets[] = {
[GCC_PCIE_0_PHY_BCR] = { 0x3e004 },
[GCC_PCIE_0_LINK_DOWN_BCR] = { 0x3e038 },
[GCC_PCIEPHY_0_PHY_BCR] = { 0x3e03c },
+ [GCC_PCIE_0_AXI_MASTER_STICKY_ARES] = {0x3e040, 6},
+ [GCC_PCIE_0_AHB_ARES] = {0x3e040, 5},
+ [GCC_PCIE_0_AXI_SLAVE_ARES] = {0x3e040, 4},
+ [GCC_PCIE_0_AXI_MASTER_ARES] = {0x3e040, 3},
+ [GCC_PCIE_0_CORE_STICKY_ARES] = {0x3e040, 2},
+ [GCC_PCIE_0_SLEEP_ARES] = {0x3e040, 1},
+ [GCC_PCIE_0_PIPE_ARES] = {0x3e040, 0},
[GCC_EMAC_BCR] = { 0x4e000 },
};
diff --git a/include/dt-bindings/clock/qcom,gcc-qcs404.h b/include/dt-bindings/clock/qcom,gcc-qcs404.h
index 6ceb55ed72c6..00ab0d77b38a 100644
--- a/include/dt-bindings/clock/qcom,gcc-qcs404.h
+++ b/include/dt-bindings/clock/qcom,gcc-qcs404.h
@@ -161,5 +161,12 @@
#define GCC_PCIE_0_LINK_DOWN_BCR 11
#define GCC_PCIEPHY_0_PHY_BCR 12
#define GCC_EMAC_BCR 13
+#define GCC_PCIE_0_AXI_MASTER_STICKY_ARES 14
+#define GCC_PCIE_0_AHB_ARES 15
+#define GCC_PCIE_0_AXI_SLAVE_ARES 16
+#define GCC_PCIE_0_AXI_MASTER_ARES 17
+#define GCC_PCIE_0_CORE_STICKY_ARES 18
+#define GCC_PCIE_0_SLEEP_ARES 19
+#define GCC_PCIE_0_PIPE_ARES 20
#endif
--
2.18.0
next prev parent reply other threads:[~2019-01-25 23:45 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-25 23:45 [PATCH 0/7] QCS404 PCIe PHY and controller Bjorn Andersson
2019-01-25 23:45 ` Bjorn Andersson
2019-01-25 23:45 ` Bjorn Andersson [this message]
2019-01-30 19:24 ` [PATCH 1/7] clk: gcc-qcs404: Add PCIe resets Stephen Boyd
2019-02-08 14:11 ` Niklas Cassel
2019-01-25 23:45 ` [PATCH 2/7] dt-bindings: phy: Add binding for Qualcomm PCIe2 PHY Bjorn Andersson
2019-02-05 5:54 ` Vinod Koul
2019-01-25 23:45 ` [PATCH 3/7] phy: qcom: Add Qualcomm PCIe2 PHY driver Bjorn Andersson
2019-02-08 14:14 ` Niklas Cassel
2019-01-25 23:45 ` [PATCH 4/7] PCI: qcom: Use clk_bulk API for 2.4.0 controllers Bjorn Andersson
2019-02-08 14:17 ` Niklas Cassel
2019-01-25 23:45 ` [PATCH 5/7] dt-bindings: PCI: qcom: Add QCS404 to the binding Bjorn Andersson
2019-01-25 23:45 ` [PATCH 6/7] PCI: qcom: Add QCS404 PCIe controller support Bjorn Andersson
2019-02-08 16:39 ` Niklas Cassel
2019-01-25 23:45 ` [PATCH 7/7] arm64: dts: qcom: qcs404: Add PCIe related nodes Bjorn Andersson
2019-01-30 19:24 ` Stephen Boyd
2019-02-05 6:01 ` Vinod Koul
2019-02-08 14:50 ` Niklas Cassel
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190125234509.26419-2-bjorn.andersson@linaro.org \
--to=bjorn.andersson@linaro.org \
--cc=andy.gross@linaro.org \
--cc=bhelgaas@google.com \
--cc=david.brown@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=khasim.mohammed@linaro.org \
--cc=kishon@ti.com \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=mark.rutland@arm.com \
--cc=mturquette@baylibre.com \
--cc=niklas.cassel@linaro.org \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
--cc=svarbanov@mm-sol.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.