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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 2/2] drm/i915: Just use icl+ definition for PLANE_WM blocks field
Date: Tue,  5 Feb 2019 22:50:56 +0200	[thread overview]
Message-ID: <20190205205056.30081-2-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20190205205056.30081-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The unused bits on PLANE_WM & co. are hardwired to zero. So no
need to worry about reading the extra bit on pre-icl.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 3 +--
 drivers/gpu/drm/i915/intel_pm.c | 9 ++-------
 2 files changed, 3 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 2be34e13af78..638a586469f9 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6784,8 +6784,7 @@ enum {
 
 #define _PLANE_BUF_CFG_1_B			0x7127c
 #define _PLANE_BUF_CFG_2_B			0x7137c
-#define  SKL_DDB_ENTRY_MASK			0x3FF
-#define  ICL_DDB_ENTRY_MASK			0x7FF
+#define  DDB_ENTRY_MASK				0x7FF /* skl+: 10 bits, icl+ 11 bits */
 #define  DDB_ENTRY_END_SHIFT			16
 #define _PLANE_BUF_CFG_1(pipe)	\
 	_PIPE(pipe, _PLANE_BUF_CFG_1_A, _PLANE_BUF_CFG_1_B)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 737005bf6816..0f15685529a0 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3927,14 +3927,9 @@ static unsigned int skl_cursor_allocation(int num_active)
 static void skl_ddb_entry_init_from_hw(struct drm_i915_private *dev_priv,
 				       struct skl_ddb_entry *entry, u32 reg)
 {
-	u16 mask;
 
-	if (INTEL_GEN(dev_priv) >= 11)
-		mask = ICL_DDB_ENTRY_MASK;
-	else
-		mask = SKL_DDB_ENTRY_MASK;
-	entry->start = reg & mask;
-	entry->end = (reg >> DDB_ENTRY_END_SHIFT) & mask;
+	entry->start = reg & DDB_ENTRY_MASK;
+	entry->end = (reg >> DDB_ENTRY_END_SHIFT) & DDB_ENTRY_MASK;
 
 	if (entry->end)
 		entry->end += 1;
-- 
2.19.2

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  reply	other threads:[~2019-02-05 20:51 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-05 20:50 [PATCH 1/2] drm/i915: Bump skl+ wm blocks to 11 bits Ville Syrjala
2019-02-05 20:50 ` Ville Syrjala [this message]
2019-02-06  1:04   ` [PATCH 2/2] drm/i915: Just use icl+ definition for PLANE_WM blocks field Souza, Jose
2019-02-06 13:18     ` Ville Syrjälä
2019-02-07  0:21       ` Souza, Jose
2019-02-05 21:34 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Bump skl+ wm blocks to 11 bits Patchwork
2019-02-06  0:47 ` [PATCH 1/2] " Souza, Jose
2019-02-06  3:28 ` ✓ Fi.CI.IGT: success for series starting with [1/2] " Patchwork

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