From: Miquel Raynal <miquel.raynal@bootlin.com> To: Boris Brezillon <bbrezillon@kernel.org>, Richard Weinberger <richard@nod.at>, David Woodhouse <dwmw2@infradead.org>, Brian Norris <computersforpeace@gmail.com>, Marek Vasut <marek.vasut@gmail.com>, Tudor Ambarus <Tudor.Ambarus@microchip.com> Cc: Vignesh R <vigneshr@ti.com>, Tudor Ambarus <tudor.ambarus@microchip.com>, Julien Su <juliensu@mxic.com.tw>, Masahiro Yamada <yamada.masahiro@socionext.com>, linux-mtd@lists.infradead.org, Thomas Petazzoni <thomas.petazzoni@bootlin.com>, Miquel Raynal <miquel.raynal@bootlin.com>, Mason Yang <masonccyang@mxic.com.tw>, linux-arm-kernel@lists.infradead.org Subject: [PATCH 12/15] mtd: rawnand: Get rid of chip->bits_per_cell Date: Thu, 21 Feb 2019 10:15:24 +0100 [thread overview] Message-ID: <20190221091527.20497-13-miquel.raynal@bootlin.com> (raw) In-Reply-To: <20190221091527.20497-1-miquel.raynal@bootlin.com> From: Boris Brezillon <bbrezillon@kernel.org> Now that we inherit from nand_device, we can use nand_device->memorg.bits_per_cell instead of having our own field at the nand_chip level. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> --- drivers/mtd/nand/raw/nand_base.c | 4 ---- drivers/mtd/nand/raw/nand_hynix.c | 2 +- drivers/mtd/nand/raw/nand_jedec.c | 1 - drivers/mtd/nand/raw/nand_micron.c | 2 +- drivers/mtd/nand/raw/nand_onfi.c | 1 - include/linux/mtd/rawnand.h | 6 ++---- 6 files changed, 4 insertions(+), 12 deletions(-) diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index 4c9c2660df64..00fe124fcb44 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -4502,7 +4502,6 @@ void nand_decode_ext_id(struct nand_chip *chip) /* The 3rd id byte holds MLC / multichip data */ memorg->bits_per_cell = nand_get_bits_per_cell(id_data[2]); - chip->bits_per_cell = nand_get_bits_per_cell(id_data[2]); /* The 4th id byte is the important one */ extid = id_data[3]; @@ -4546,7 +4545,6 @@ static void nand_decode_id(struct nand_chip *chip, struct nand_flash_dev *type) /* All legacy ID NAND are small-page, SLC */ memorg->bits_per_cell = 1; - chip->bits_per_cell = 1; } /* @@ -4589,7 +4587,6 @@ static bool find_full_id_nand(struct nand_chip *chip, mtd->oobsize = memorg->oobsize; memorg->bits_per_cell = nand_get_bits_per_cell(id_data[2]); - chip->bits_per_cell = nand_get_bits_per_cell(id_data[2]); chip->chipsize = (uint64_t)type->chipsize << 20; chip->options |= type->options; chip->ecc_strength_ds = NAND_ECC_STRENGTH(type); @@ -4625,7 +4622,6 @@ static void nand_manufacturer_detect(struct nand_chip *chip) /* The 3rd id byte holds MLC / multichip data */ memorg->bits_per_cell = nand_get_bits_per_cell(chip->id.data[2]); - chip->bits_per_cell = nand_get_bits_per_cell(chip->id.data[2]); chip->manufacturer.desc->ops->detect(chip); } else { nand_decode_ext_id(chip); diff --git a/drivers/mtd/nand/raw/nand_hynix.c b/drivers/mtd/nand/raw/nand_hynix.c index 94ea8c593589..272b934dffb7 100644 --- a/drivers/mtd/nand/raw/nand_hynix.c +++ b/drivers/mtd/nand/raw/nand_hynix.c @@ -592,7 +592,7 @@ static void hynix_nand_extract_scrambling_requirements(struct nand_chip *chip, u8 nand_tech; /* We need scrambling on all TLC NANDs*/ - if (chip->bits_per_cell > 2) + if (nanddev_bits_per_cell(&chip->base) > 2) chip->options |= NAND_NEED_SCRAMBLING; /* And on MLC NANDs with sub-3xnm process */ diff --git a/drivers/mtd/nand/raw/nand_jedec.c b/drivers/mtd/nand/raw/nand_jedec.c index 61e33ee7ee19..030f178c7a97 100644 --- a/drivers/mtd/nand/raw/nand_jedec.c +++ b/drivers/mtd/nand/raw/nand_jedec.c @@ -104,7 +104,6 @@ int nand_jedec_detect(struct nand_chip *chip) chip->chipsize = memorg->eraseblocks_per_lun; chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count; memorg->bits_per_cell = p->bits_per_cell; - chip->bits_per_cell = p->bits_per_cell; if (le16_to_cpu(p->features) & JEDEC_FEATURE_16_BIT_BUS) chip->options |= NAND_BUSWIDTH_16; diff --git a/drivers/mtd/nand/raw/nand_micron.c b/drivers/mtd/nand/raw/nand_micron.c index b85e1c13b79e..98ce6575aa64 100644 --- a/drivers/mtd/nand/raw/nand_micron.c +++ b/drivers/mtd/nand/raw/nand_micron.c @@ -385,7 +385,7 @@ static int micron_supports_on_die_ecc(struct nand_chip *chip) if (!chip->parameters.onfi) return MICRON_ON_DIE_UNSUPPORTED; - if (chip->bits_per_cell != 1) + if (nanddev_bits_per_cell(&chip->base) != 1) return MICRON_ON_DIE_UNSUPPORTED; /* diff --git a/drivers/mtd/nand/raw/nand_onfi.c b/drivers/mtd/nand/raw/nand_onfi.c index 3ca9c8923a30..a6b9fc9a335b 100644 --- a/drivers/mtd/nand/raw/nand_onfi.c +++ b/drivers/mtd/nand/raw/nand_onfi.c @@ -249,7 +249,6 @@ int nand_onfi_detect(struct nand_chip *chip) chip->chipsize = memorg->eraseblocks_per_lun; chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count; memorg->bits_per_cell = p->bits_per_cell; - chip->bits_per_cell = p->bits_per_cell; if (le16_to_cpu(p->features) & ONFI_FEATURE_16_BIT_BUS) chip->options |= NAND_BUSWIDTH_16; diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index d748e09de480..24ecd9a4f952 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -1004,7 +1004,6 @@ struct nand_legacy { * @badblockbits: [INTERN] minimum number of set bits in a good block's * bad block marker position; i.e., BBM == 11110111b is * not bad when badblockbits == 7 - * @bits_per_cell: [INTERN] number of bits per cell. i.e., 1 means SLC. * @ecc_strength_ds: [INTERN] ECC correctability from the datasheet. * Minimum amount of bit errors per @ecc_step_ds guaranteed * to be correctable. If unknown, set to zero. @@ -1073,7 +1072,6 @@ struct nand_chip { } pagecache; int subpagesize; - uint8_t bits_per_cell; uint16_t ecc_strength_ds; uint16_t ecc_step_ds; int onfi_timing_mode_default; @@ -1244,9 +1242,9 @@ int nand_create_bbt(struct nand_chip *chip); */ static inline bool nand_is_slc(struct nand_chip *chip) { - WARN(chip->bits_per_cell == 0, + WARN(nanddev_bits_per_cell(&chip->base) == 0, "chip->bits_per_cell is used uninitialized\n"); - return chip->bits_per_cell == 1; + return nanddev_bits_per_cell(&chip->base) == 1; } /** -- 2.19.1 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com> To: Boris Brezillon <bbrezillon@kernel.org>, Richard Weinberger <richard@nod.at>, David Woodhouse <dwmw2@infradead.org>, Brian Norris <computersforpeace@gmail.com>, Marek Vasut <marek.vasut@gmail.com>, Tudor Ambarus <Tudor.Ambarus@microchip.com> Cc: Vignesh R <vigneshr@ti.com>, Tudor Ambarus <tudor.ambarus@microchip.com>, Julien Su <juliensu@mxic.com.tw>, Masahiro Yamada <yamada.masahiro@socionext.com>, linux-mtd@lists.infradead.org, Thomas Petazzoni <thomas.petazzoni@bootlin.com>, Miquel Raynal <miquel.raynal@bootlin.com>, Mason Yang <masonccyang@mxic.com.tw>, linux-arm-kernel@lists.infradead.org Subject: [PATCH 12/15] mtd: rawnand: Get rid of chip->bits_per_cell Date: Thu, 21 Feb 2019 10:15:24 +0100 [thread overview] Message-ID: <20190221091527.20497-13-miquel.raynal@bootlin.com> (raw) In-Reply-To: <20190221091527.20497-1-miquel.raynal@bootlin.com> From: Boris Brezillon <bbrezillon@kernel.org> Now that we inherit from nand_device, we can use nand_device->memorg.bits_per_cell instead of having our own field at the nand_chip level. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> --- drivers/mtd/nand/raw/nand_base.c | 4 ---- drivers/mtd/nand/raw/nand_hynix.c | 2 +- drivers/mtd/nand/raw/nand_jedec.c | 1 - drivers/mtd/nand/raw/nand_micron.c | 2 +- drivers/mtd/nand/raw/nand_onfi.c | 1 - include/linux/mtd/rawnand.h | 6 ++---- 6 files changed, 4 insertions(+), 12 deletions(-) diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index 4c9c2660df64..00fe124fcb44 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -4502,7 +4502,6 @@ void nand_decode_ext_id(struct nand_chip *chip) /* The 3rd id byte holds MLC / multichip data */ memorg->bits_per_cell = nand_get_bits_per_cell(id_data[2]); - chip->bits_per_cell = nand_get_bits_per_cell(id_data[2]); /* The 4th id byte is the important one */ extid = id_data[3]; @@ -4546,7 +4545,6 @@ static void nand_decode_id(struct nand_chip *chip, struct nand_flash_dev *type) /* All legacy ID NAND are small-page, SLC */ memorg->bits_per_cell = 1; - chip->bits_per_cell = 1; } /* @@ -4589,7 +4587,6 @@ static bool find_full_id_nand(struct nand_chip *chip, mtd->oobsize = memorg->oobsize; memorg->bits_per_cell = nand_get_bits_per_cell(id_data[2]); - chip->bits_per_cell = nand_get_bits_per_cell(id_data[2]); chip->chipsize = (uint64_t)type->chipsize << 20; chip->options |= type->options; chip->ecc_strength_ds = NAND_ECC_STRENGTH(type); @@ -4625,7 +4622,6 @@ static void nand_manufacturer_detect(struct nand_chip *chip) /* The 3rd id byte holds MLC / multichip data */ memorg->bits_per_cell = nand_get_bits_per_cell(chip->id.data[2]); - chip->bits_per_cell = nand_get_bits_per_cell(chip->id.data[2]); chip->manufacturer.desc->ops->detect(chip); } else { nand_decode_ext_id(chip); diff --git a/drivers/mtd/nand/raw/nand_hynix.c b/drivers/mtd/nand/raw/nand_hynix.c index 94ea8c593589..272b934dffb7 100644 --- a/drivers/mtd/nand/raw/nand_hynix.c +++ b/drivers/mtd/nand/raw/nand_hynix.c @@ -592,7 +592,7 @@ static void hynix_nand_extract_scrambling_requirements(struct nand_chip *chip, u8 nand_tech; /* We need scrambling on all TLC NANDs*/ - if (chip->bits_per_cell > 2) + if (nanddev_bits_per_cell(&chip->base) > 2) chip->options |= NAND_NEED_SCRAMBLING; /* And on MLC NANDs with sub-3xnm process */ diff --git a/drivers/mtd/nand/raw/nand_jedec.c b/drivers/mtd/nand/raw/nand_jedec.c index 61e33ee7ee19..030f178c7a97 100644 --- a/drivers/mtd/nand/raw/nand_jedec.c +++ b/drivers/mtd/nand/raw/nand_jedec.c @@ -104,7 +104,6 @@ int nand_jedec_detect(struct nand_chip *chip) chip->chipsize = memorg->eraseblocks_per_lun; chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count; memorg->bits_per_cell = p->bits_per_cell; - chip->bits_per_cell = p->bits_per_cell; if (le16_to_cpu(p->features) & JEDEC_FEATURE_16_BIT_BUS) chip->options |= NAND_BUSWIDTH_16; diff --git a/drivers/mtd/nand/raw/nand_micron.c b/drivers/mtd/nand/raw/nand_micron.c index b85e1c13b79e..98ce6575aa64 100644 --- a/drivers/mtd/nand/raw/nand_micron.c +++ b/drivers/mtd/nand/raw/nand_micron.c @@ -385,7 +385,7 @@ static int micron_supports_on_die_ecc(struct nand_chip *chip) if (!chip->parameters.onfi) return MICRON_ON_DIE_UNSUPPORTED; - if (chip->bits_per_cell != 1) + if (nanddev_bits_per_cell(&chip->base) != 1) return MICRON_ON_DIE_UNSUPPORTED; /* diff --git a/drivers/mtd/nand/raw/nand_onfi.c b/drivers/mtd/nand/raw/nand_onfi.c index 3ca9c8923a30..a6b9fc9a335b 100644 --- a/drivers/mtd/nand/raw/nand_onfi.c +++ b/drivers/mtd/nand/raw/nand_onfi.c @@ -249,7 +249,6 @@ int nand_onfi_detect(struct nand_chip *chip) chip->chipsize = memorg->eraseblocks_per_lun; chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count; memorg->bits_per_cell = p->bits_per_cell; - chip->bits_per_cell = p->bits_per_cell; if (le16_to_cpu(p->features) & ONFI_FEATURE_16_BIT_BUS) chip->options |= NAND_BUSWIDTH_16; diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index d748e09de480..24ecd9a4f952 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -1004,7 +1004,6 @@ struct nand_legacy { * @badblockbits: [INTERN] minimum number of set bits in a good block's * bad block marker position; i.e., BBM == 11110111b is * not bad when badblockbits == 7 - * @bits_per_cell: [INTERN] number of bits per cell. i.e., 1 means SLC. * @ecc_strength_ds: [INTERN] ECC correctability from the datasheet. * Minimum amount of bit errors per @ecc_step_ds guaranteed * to be correctable. If unknown, set to zero. @@ -1073,7 +1072,6 @@ struct nand_chip { } pagecache; int subpagesize; - uint8_t bits_per_cell; uint16_t ecc_strength_ds; uint16_t ecc_step_ds; int onfi_timing_mode_default; @@ -1244,9 +1242,9 @@ int nand_create_bbt(struct nand_chip *chip); */ static inline bool nand_is_slc(struct nand_chip *chip) { - WARN(chip->bits_per_cell == 0, + WARN(nanddev_bits_per_cell(&chip->base) == 0, "chip->bits_per_cell is used uninitialized\n"); - return chip->bits_per_cell == 1; + return nanddev_bits_per_cell(&chip->base) == 1; } /** -- 2.19.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-02-21 9:21 UTC|newest] Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-02-21 9:15 [PATCH 00/15] mtd: rawnand: 5th batch of cleanups Miquel Raynal 2019-02-21 9:15 ` Miquel Raynal 2019-02-21 9:15 ` [PATCH 01/15] mtd: nand: Add max_bad_eraseblocks_per_lun info to memorg Miquel Raynal 2019-02-21 9:15 ` Miquel Raynal 2019-02-23 13:03 ` Schrempf Frieder 2019-02-23 13:03 ` Schrempf Frieder 2019-02-21 9:15 ` [PATCH 02/15] mtd: nand: Add an helper returning the number of eraseblocks per target Miquel Raynal 2019-02-21 9:15 ` Miquel Raynal 2019-02-23 13:04 ` Schrempf Frieder 2019-02-23 13:04 ` Schrempf Frieder 2019-02-21 9:15 ` [PATCH 03/15] mtd: nand: Add an helper to retrieve the number of pages " Miquel Raynal 2019-02-21 9:15 ` Miquel Raynal 2019-02-23 13:04 ` Schrempf Frieder 2019-02-23 13:04 ` Schrempf Frieder 2019-02-21 9:15 ` [PATCH 04/15] mtd: spinand: Implement mtd->_max_bad_blocks Miquel Raynal 2019-02-21 9:15 ` Miquel Raynal 2019-02-23 13:05 ` Schrempf Frieder 2019-02-23 13:05 ` Schrempf Frieder 2019-02-21 9:15 ` [PATCH 05/15] mtd: rawnand: Use nand_to_mtd() in nand_{set, get}_flash_node() Miquel Raynal 2019-02-21 9:15 ` Miquel Raynal 2019-02-23 13:05 ` Schrempf Frieder 2019-02-23 13:05 ` Schrempf Frieder 2019-02-21 9:15 ` [PATCH 06/15] mtd: rawnand: Prepare things to reuse the generic NAND layer Miquel Raynal 2019-02-21 9:15 ` Miquel Raynal 2019-02-23 13:06 ` Schrempf Frieder 2019-02-23 13:06 ` Schrempf Frieder 2019-02-21 9:15 ` [PATCH 07/15] mtd: rawnand: Fill memorg during detection Miquel Raynal 2019-02-21 9:15 ` Miquel Raynal 2019-02-23 13:00 ` Schrempf Frieder 2019-02-23 13:00 ` Schrempf Frieder 2019-02-26 13:09 ` Miquel Raynal 2019-02-26 13:09 ` Miquel Raynal 2019-02-21 9:15 ` [PATCH 08/15] mtd: rawnand: Initialize the nand_device object Miquel Raynal 2019-02-21 9:15 ` Miquel Raynal 2019-02-23 13:20 ` Schrempf Frieder 2019-02-23 13:20 ` Schrempf Frieder 2019-02-21 9:15 ` [PATCH 09/15] mtd: rawnand: Provide an helper to get chip->data_buf Miquel Raynal 2019-02-21 9:15 ` Miquel Raynal 2019-02-23 13:13 ` Schrempf Frieder 2019-02-23 13:13 ` Schrempf Frieder 2019-02-21 9:15 ` [PATCH 10/15] mtd: rawnand: Move all page cache related fields to a sub-struct Miquel Raynal 2019-02-21 9:15 ` Miquel Raynal 2019-02-23 13:13 ` Schrempf Frieder 2019-02-23 13:13 ` Schrempf Frieder 2019-02-21 9:15 ` [PATCH 11/15] mtd: rawnand: Use nanddev_mtd_max_bad_blocks() Miquel Raynal 2019-02-21 9:15 ` Miquel Raynal 2019-02-23 13:14 ` Schrempf Frieder 2019-02-23 13:14 ` Schrempf Frieder 2019-02-21 9:15 ` Miquel Raynal [this message] 2019-02-21 9:15 ` [PATCH 12/15] mtd: rawnand: Get rid of chip->bits_per_cell Miquel Raynal 2019-02-23 13:14 ` Schrempf Frieder 2019-02-23 13:14 ` Schrempf Frieder 2019-02-21 9:15 ` [PATCH 13/15] mtd: rawnand: Get rid of chip->chipsize Miquel Raynal 2019-02-21 9:15 ` Miquel Raynal 2019-02-23 13:01 ` Schrempf Frieder 2019-02-23 13:01 ` Schrempf Frieder 2019-02-21 9:15 ` [PATCH 14/15] mtd: rawnand: Get rid of chip->numchips Miquel Raynal 2019-02-21 9:15 ` Miquel Raynal 2019-02-23 13:15 ` Schrempf Frieder 2019-02-23 13:15 ` Schrempf Frieder 2019-02-21 9:15 ` [PATCH 15/15] mtd: rawnand: Get rid of chip->ecc_{strength,step}_ds Miquel Raynal 2019-02-21 9:15 ` Miquel Raynal 2019-02-23 13:15 ` Schrempf Frieder 2019-02-23 13:15 ` Schrempf Frieder
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