[PATCH 0/5] Enable per-port SATA interrupts and drop an hack in the IRQ subsystem

From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Gregory Clement <gregory.clement@bootlin.com>,
	Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>, Jens Axboe <axboe@kernel.dk>,
	Hans de Goede <hdegoede@redhat.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <marc.zyngier@arm.com>
Cc: devicetree@vger.kernel.org,
	Antoine Tenart <antoine.tenart@bootlin.com>,
	Maxime Chevallier <maxime.chevallier@bootlin.com>,
	Nadav Haklai <nadavh@marvell.com>,
	linux-ide@vger.kernel.org,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH 0/5] Enable per-port SATA interrupts and drop an hack in the IRQ subsystem
Date: Fri, 22 Feb 2019 15:53:51 +0100	[thread overview]
Message-ID: <20190222145356.23072-1-miquel.raynal@bootlin.com> (raw)

Hello,

Some time ago, when the initial support for Armada CP110 was
contributed, the SATA core was not able to handle per-port
interrupts. Despite the hardware reality, the device tree only
represents one main interrupt for the two ports. Having both SATA
ports enabled at the same time has been achieved by a hack in the ICU
driver(1) that faked the use of the two interrupts, no matter which
SATA port was in use.

Now that the SATA core is ready to handle more than one interrupt,
this series adds support for it in the libahci_platform code. The
CP110 device tree must be updated to reflect the two SATA ports
available and their respective interrupts. To do not break DT backward
compatibility, the ahci_platform driver now embeds a special quirk
which checks if the DT is valid (only for A8k compatible) and, if
needed, creates the two missing sub-nodes, and assign them the
relevant "reg" and "interrupts" properties, before removing the main
SATA node "interrupts" one.

Thanks,
Miquèl

(1) The ICU is an irqchip aggregating the CP110 (south-bridge)
interrupts into MSIs for the AP806 (north-bridge).

Miquel Raynal (4):
  ata: libahci: Ensure the host interrupt status bits are cleared
  ata: libahci_platform: Support per-port interrupts
  irqchip/irq-mvebu-icu: Move the double SATA ports interrupt hack
  arm64: dts: marvell: armada-8040-clearfog: Drop non-existent SATA port

Thomas Petazzoni (1):
  arm64: dts: marvell: armada-cp110: Switch to per-port SATA interrupts

 .../arm64/boot/dts/marvell/armada-7040-db.dts |   7 +-
 .../marvell/armada-8040-clearfog-gt-8k.dts    |   5 -
 .../arm64/boot/dts/marvell/armada-8040-db.dts |  14 +-
 arch/arm64/boot/dts/marvell/armada-cp110.dtsi |  16 +-
 drivers/ata/acard-ahci.c                      |   2 +-
 drivers/ata/ahci.c                            |   2 +-
 drivers/ata/ahci.h                            |   3 +-
 drivers/ata/ahci_platform.c                   | 174 ++++++++++++++++++
 drivers/ata/libahci.c                         |   9 +-
 drivers/ata/libahci_platform.c                |  66 +++++--
 drivers/ata/sata_highbank.c                   |   2 +-
 drivers/irqchip/irq-mvebu-icu.c               |  18 --
 12 files changed, 274 insertions(+), 44 deletions(-)

-- 
2.19.1

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