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From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: tglx@linutronix.de
Cc: linux-kernel@vger.kernel.org, Chen-Yu Tsai <wens@csie.org>,
	Maxime Ripard <maxime.ripard@bootlin.com>,
	linux-arm-kernel@lists.infradead.org (moderated
	list:ARM/Allwinner sunXi SoC support)
Subject: [PATCH 01/18] clocksource/drivers/sun5i: Fail gracefully when clock rate is unavailable
Date: Sat, 23 Feb 2019 14:06:49 +0100	[thread overview]
Message-ID: <20190223130707.16704-1-daniel.lezcano@linaro.org> (raw)
In-Reply-To: <b5d75b05-b78c-535c-2b35-9a1f5a3a853f@linaro.org>

From: Chen-Yu Tsai <wens@csie.org>

If the clock tree is not fully populated when the timer-sun5i init code
is called, attempts to get the clock rate for the timer would fail and
return 0.

Make the init code for both clock events and clocksource check the
returned clock rate and fail gracefully if the result is 0, instead of
causing a divide by 0 exception later on.

Fixes: 4a59058f0b09 ("clocksource/drivers/sun5i: Refactor the current code")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 drivers/clocksource/timer-sun5i.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/clocksource/timer-sun5i.c b/drivers/clocksource/timer-sun5i.c
index 3b56ea3f52af..552c5254390c 100644
--- a/drivers/clocksource/timer-sun5i.c
+++ b/drivers/clocksource/timer-sun5i.c
@@ -202,6 +202,11 @@ static int __init sun5i_setup_clocksource(struct device_node *node,
 	}
 
 	rate = clk_get_rate(clk);
+	if (!rate) {
+		pr_err("Couldn't get parent clock rate\n");
+		ret = -EINVAL;
+		goto err_disable_clk;
+	}
 
 	cs->timer.base = base;
 	cs->timer.clk = clk;
@@ -275,6 +280,11 @@ static int __init sun5i_setup_clockevent(struct device_node *node, void __iomem
 	}
 
 	rate = clk_get_rate(clk);
+	if (!rate) {
+		pr_err("Couldn't get parent clock rate\n");
+		ret = -EINVAL;
+		goto err_disable_clk;
+	}
 
 	ce->timer.base = base;
 	ce->timer.ticks_per_jiffy = DIV_ROUND_UP(rate, HZ);
-- 
2.17.1


WARNING: multiple messages have this Message-ID (diff)
From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: tglx@linutronix.de
Cc: Maxime Ripard <maxime.ripard@bootlin.com>,
	Chen-Yu Tsai <wens@csie.org>,
	linux-kernel@vger.kernel.org,
	"moderated list:ARM/Allwinner sunXi SoC support"
	<linux-arm-kernel@lists.infradead.org>
Subject: [PATCH 01/18] clocksource/drivers/sun5i: Fail gracefully when clock rate is unavailable
Date: Sat, 23 Feb 2019 14:06:49 +0100	[thread overview]
Message-ID: <20190223130707.16704-1-daniel.lezcano@linaro.org> (raw)
In-Reply-To: <b5d75b05-b78c-535c-2b35-9a1f5a3a853f@linaro.org>

From: Chen-Yu Tsai <wens@csie.org>

If the clock tree is not fully populated when the timer-sun5i init code
is called, attempts to get the clock rate for the timer would fail and
return 0.

Make the init code for both clock events and clocksource check the
returned clock rate and fail gracefully if the result is 0, instead of
causing a divide by 0 exception later on.

Fixes: 4a59058f0b09 ("clocksource/drivers/sun5i: Refactor the current code")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 drivers/clocksource/timer-sun5i.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/clocksource/timer-sun5i.c b/drivers/clocksource/timer-sun5i.c
index 3b56ea3f52af..552c5254390c 100644
--- a/drivers/clocksource/timer-sun5i.c
+++ b/drivers/clocksource/timer-sun5i.c
@@ -202,6 +202,11 @@ static int __init sun5i_setup_clocksource(struct device_node *node,
 	}
 
 	rate = clk_get_rate(clk);
+	if (!rate) {
+		pr_err("Couldn't get parent clock rate\n");
+		ret = -EINVAL;
+		goto err_disable_clk;
+	}
 
 	cs->timer.base = base;
 	cs->timer.clk = clk;
@@ -275,6 +280,11 @@ static int __init sun5i_setup_clockevent(struct device_node *node, void __iomem
 	}
 
 	rate = clk_get_rate(clk);
+	if (!rate) {
+		pr_err("Couldn't get parent clock rate\n");
+		ret = -EINVAL;
+		goto err_disable_clk;
+	}
 
 	ce->timer.base = base;
 	ce->timer.ticks_per_jiffy = DIV_ROUND_UP(rate, HZ);
-- 
2.17.1


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  reply	other threads:[~2019-02-23 13:07 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-23 13:05 [GIT PULL] clockevents for 5.1 Daniel Lezcano
2019-02-23 13:06 ` Daniel Lezcano [this message]
2019-02-23 13:06   ` [PATCH 01/18] clocksource/drivers/sun5i: Fail gracefully when clock rate is unavailable Daniel Lezcano
2019-02-23 13:06   ` [PATCH 02/18] clocksource/drivers/arch_timer: Workaround for Allwinner A64 timer instability Daniel Lezcano
2019-02-23 13:06     ` Daniel Lezcano
     [not found]     ` <20190226212356.C6B68218A2@mail.kernel.org>
2019-02-27  2:55       ` Samuel Holland
2019-02-23 13:06   ` [PATCH 03/18] clocksource/drivers/exynos_mct: Move one-shot check from tick clear to ISR Daniel Lezcano
2019-02-23 13:06     ` Daniel Lezcano
2019-02-23 13:06     ` Daniel Lezcano
2019-02-23 13:06   ` [PATCH 04/18] clocksource/drivers/exynos_mct: Clear timer interrupt when shutdown Daniel Lezcano
2019-02-23 13:06     ` Daniel Lezcano
2019-02-23 13:06     ` Daniel Lezcano
2019-02-23 13:06   ` [PATCH 05/18] dt-bindings: timer: renesas, cmt: Document r8a774c0 CMT support Daniel Lezcano
2019-02-23 13:06     ` Daniel Lezcano
2019-02-23 13:06   ` [PATCH 06/18] dt-bindings: timer: renesas: tmu: Document r8a774c0 bindings Daniel Lezcano
2019-02-23 13:06     ` Daniel Lezcano
2019-02-23 13:06   ` [PATCH 07/18] clocksource/drivers/riscv: Add required checks during clock source init Daniel Lezcano
2019-02-23 13:06     ` Daniel Lezcano
2019-02-23 13:06   ` [PATCH 08/18] clocksource/drivers/exynos_mct: Remove dead code Daniel Lezcano
2019-02-23 13:06     ` Daniel Lezcano
2019-02-23 13:06     ` Daniel Lezcano
2019-02-23 13:06   ` [PATCH 09/18] clocksource/drivers/exynos_mct: Fix error path in timer resources initialization Daniel Lezcano
2019-02-23 13:06     ` Daniel Lezcano
2019-02-23 13:06     ` Daniel Lezcano
2019-02-23 13:06   ` [PATCH 10/18] dt-bindings: timer: mediatek: update bindings for MT7629 SoC Daniel Lezcano
2019-02-23 13:06     ` Daniel Lezcano
2019-02-23 13:06     ` Daniel Lezcano
2019-02-23 13:06   ` [PATCH 11/18] clocksource/drivers/exynos_mct: Remove unused header includes Daniel Lezcano
2019-02-23 13:06     ` Daniel Lezcano
2019-02-23 13:06     ` Daniel Lezcano
2019-02-23 13:07   ` [PATCH 12/18] dt-bindings: timer: gpt: update binding doc Daniel Lezcano
2019-02-23 13:07     ` Daniel Lezcano
2019-02-23 13:07   ` [PATCH 13/18] clocksource/drivers/tango-xtal: Rename the file for consistency Daniel Lezcano
2019-02-23 13:07   ` [PATCH 14/18] clocksource/drivers/timer-pxa: " Daniel Lezcano
2019-02-23 13:07   ` [PATCH 15/18] clocksource/drivers/timer-cs5535: " Daniel Lezcano
2019-02-23 13:07   ` [PATCH 16/18] dt-bindings: timer: add Tegra210 timer Daniel Lezcano
2019-02-23 13:07     ` Daniel Lezcano
2019-02-23 13:07   ` [PATCH 17/18] clocksource/drivers/tegra: Add Tegra210 timer support Daniel Lezcano
2019-02-23 13:07     ` Daniel Lezcano
2019-02-23 13:07   ` [PATCH 18/18] soc/tegra: default select TEGRA_TIMER for Tegra210 Daniel Lezcano
2019-02-23 13:07     ` Daniel Lezcano

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