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From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Boris Brezillon <bbrezillon@kernel.org>,
	Richard Weinberger <richard@nod.at>,
	David Woodhouse <dwmw2@infradead.org>,
	Brian Norris <computersforpeace@gmail.com>,
	Marek Vasut <marek.vasut@gmail.com>,
	Tudor Ambarus <Tudor.Ambarus@microchip.com>
Cc: Vignesh R <vigneshr@ti.com>,
	Tudor Ambarus <tudor.ambarus@microchip.com>,
	Julien Su <juliensu@mxic.com.tw>,
	Schrempf Frieder <frieder.schrempf@kontron.de>,
	Masahiro Yamada <yamada.masahiro@socionext.com>,
	linux-mtd@lists.infradead.org,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Mason Yang <masonccyang@mxic.com.tw>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 10/15] mtd: rawnand: Move all page cache related fields to a sub-struct
Date: Mon,  4 Mar 2019 21:15:17 +0100	[thread overview]
Message-ID: <20190304201522.11323-11-miquel.raynal@bootlin.com> (raw)
In-Reply-To: <20190304201522.11323-1-miquel.raynal@bootlin.com>

From: Boris Brezillon <bbrezillon@kernel.org>

Looking at the field names it's hard to tell what ->data_buf, ->pagebuf
and ->pagebuf_bitflips are for. Clarify that by moving those fields
in a sub-struct named pagecache.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
---
 drivers/mtd/nand/raw/nand_base.c | 28 ++++++++++++++--------------
 include/linux/mtd/rawnand.h      | 18 +++++++++++-------
 2 files changed, 25 insertions(+), 21 deletions(-)

diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 4b10652b0b97..54d32ed57297 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -493,8 +493,8 @@ static int nand_do_write_oob(struct nand_chip *chip, loff_t to,
 	}
 
 	/* Invalidate the page cache, if we write to the cached page */
-	if (page == chip->pagebuf)
-		chip->pagebuf = -1;
+	if (page == chip->pagecache.page)
+		chip->pagecache.page = -1;
 
 	nand_fill_oob(chip, ops->oobbuf, ops->ooblen, ops);
 
@@ -3204,7 +3204,7 @@ static int nand_do_read_ops(struct nand_chip *chip, loff_t from,
 			use_bufpoi = 0;
 
 		/* Is the current page in the buffer? */
-		if (realpage != chip->pagebuf || oob) {
+		if (realpage != chip->pagecache.page || oob) {
 			bufpoi = use_bufpoi ? chip->data_buf : buf;
 
 			if (use_bufpoi && aligned)
@@ -3230,7 +3230,7 @@ static int nand_do_read_ops(struct nand_chip *chip, loff_t from,
 			if (ret < 0) {
 				if (use_bufpoi)
 					/* Invalidate page cache */
-					chip->pagebuf = -1;
+					chip->pagecache.page = -1;
 				break;
 			}
 
@@ -3239,11 +3239,11 @@ static int nand_do_read_ops(struct nand_chip *chip, loff_t from,
 				if (!NAND_HAS_SUBPAGE_READ(chip) && !oob &&
 				    !(mtd->ecc_stats.failed - ecc_failures) &&
 				    (ops->mode != MTD_OPS_RAW)) {
-					chip->pagebuf = realpage;
-					chip->pagebuf_bitflips = ret;
+					chip->pagecache.page = realpage;
+					chip->pagecache.bitflips = ret;
 				} else {
 					/* Invalidate page cache */
-					chip->pagebuf = -1;
+					chip->pagecache.page = -1;
 				}
 				memcpy(buf, chip->data_buf + col, bytes);
 			}
@@ -3283,7 +3283,7 @@ static int nand_do_read_ops(struct nand_chip *chip, loff_t from,
 			memcpy(buf, chip->data_buf + col, bytes);
 			buf += bytes;
 			max_bitflips = max_t(unsigned int, max_bitflips,
-					     chip->pagebuf_bitflips);
+					     chip->pagecache.bitflips);
 		}
 
 		readlen -= bytes;
@@ -4002,9 +4002,9 @@ static int nand_do_write_ops(struct nand_chip *chip, loff_t to,
 	page = realpage & chip->pagemask;
 
 	/* Invalidate the page cache, when we write to the cached page */
-	if (to <= ((loff_t)chip->pagebuf << chip->page_shift) &&
-	    ((loff_t)chip->pagebuf << chip->page_shift) < (to + ops->len))
-		chip->pagebuf = -1;
+	if (to <= ((loff_t)chip->pagecache.page << chip->page_shift) &&
+	    ((loff_t)chip->pagecache.page << chip->page_shift) < (to + ops->len))
+		chip->pagecache.page = -1;
 
 	/* Don't allow multipage oob writes with offset */
 	if (oob && ops->ooboffs && (ops->ooboffs + ops->ooblen > oobmaxlen)) {
@@ -4241,9 +4241,9 @@ int nand_erase_nand(struct nand_chip *chip, struct erase_info *instr,
 		 * Invalidate the page cache, if we erase the block which
 		 * contains the current cached page.
 		 */
-		if (page <= chip->pagebuf && chip->pagebuf <
+		if (page <= chip->pagecache.page && chip->pagecache.page <
 		    (page + pages_per_block))
-			chip->pagebuf = -1;
+			chip->pagecache.page = -1;
 
 		if (chip->legacy.erase)
 			status = chip->legacy.erase(chip,
@@ -5821,7 +5821,7 @@ static int nand_scan_tail(struct nand_chip *chip)
 	chip->state = FL_READY;
 
 	/* Invalidate the pagebuffer reference */
-	chip->pagebuf = -1;
+	chip->pagecache.page = -1;
 
 	/* Large page NAND with SOFT_ECC should support subpage reads */
 	switch (ecc->mode) {
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index e62c3ab4e0f7..00a8795b215d 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -1019,10 +1019,10 @@ struct nand_legacy {
  * @chipsize:		[INTERN] the size of one chip for multichip arrays
  * @pagemask:		[INTERN] page number mask = number of (pages / chip) - 1
  * @data_buf:		[INTERN] buffer for data, size is (page size + oobsize).
- * @pagebuf:		[INTERN] holds the pagenumber which is currently in
- *			data_buf.
- * @pagebuf_bitflips:	[INTERN] holds the bitflip count for the page which is
- *			currently in data_buf.
+ * @pagecache:		Structure containing page cache related fields
+ * @pagecache.bitflips:	Number of bitflips of the cached page
+ * @pagecache.page:	Page number currently in the cache. -1 means no page is
+ *			currently cached
  * @subpagesize:	[INTERN] holds the subpagesize
  * @id:			[INTERN] holds NAND ID
  * @parameters:		[INTERN] holds generic parameters under an easily
@@ -1069,8 +1069,12 @@ struct nand_chip {
 	uint64_t chipsize;
 	int pagemask;
 	u8 *data_buf;
-	int pagebuf;
-	unsigned int pagebuf_bitflips;
+
+	struct {
+		unsigned int bitflips;
+		int page;
+	} pagecache;
+
 	int subpagesize;
 	uint8_t bits_per_cell;
 	uint16_t ecc_strength_ds;
@@ -1374,7 +1378,7 @@ void nand_deselect_target(struct nand_chip *chip);
  */
 static inline void *nand_get_data_buf(struct nand_chip *chip)
 {
-	chip->pagebuf = -1;
+	chip->pagecache.page = -1;
 
 	return chip->data_buf;
 }
-- 
2.19.1


______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Boris Brezillon <bbrezillon@kernel.org>,
	Richard Weinberger <richard@nod.at>,
	David Woodhouse <dwmw2@infradead.org>,
	Brian Norris <computersforpeace@gmail.com>,
	Marek Vasut <marek.vasut@gmail.com>,
	Tudor Ambarus <Tudor.Ambarus@microchip.com>
Cc: Vignesh R <vigneshr@ti.com>,
	Tudor Ambarus <tudor.ambarus@microchip.com>,
	Julien Su <juliensu@mxic.com.tw>,
	Schrempf Frieder <frieder.schrempf@kontron.de>,
	Masahiro Yamada <yamada.masahiro@socionext.com>,
	linux-mtd@lists.infradead.org,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Mason Yang <masonccyang@mxic.com.tw>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 10/15] mtd: rawnand: Move all page cache related fields to a sub-struct
Date: Mon,  4 Mar 2019 21:15:17 +0100	[thread overview]
Message-ID: <20190304201522.11323-11-miquel.raynal@bootlin.com> (raw)
In-Reply-To: <20190304201522.11323-1-miquel.raynal@bootlin.com>

From: Boris Brezillon <bbrezillon@kernel.org>

Looking at the field names it's hard to tell what ->data_buf, ->pagebuf
and ->pagebuf_bitflips are for. Clarify that by moving those fields
in a sub-struct named pagecache.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
---
 drivers/mtd/nand/raw/nand_base.c | 28 ++++++++++++++--------------
 include/linux/mtd/rawnand.h      | 18 +++++++++++-------
 2 files changed, 25 insertions(+), 21 deletions(-)

diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 4b10652b0b97..54d32ed57297 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -493,8 +493,8 @@ static int nand_do_write_oob(struct nand_chip *chip, loff_t to,
 	}
 
 	/* Invalidate the page cache, if we write to the cached page */
-	if (page == chip->pagebuf)
-		chip->pagebuf = -1;
+	if (page == chip->pagecache.page)
+		chip->pagecache.page = -1;
 
 	nand_fill_oob(chip, ops->oobbuf, ops->ooblen, ops);
 
@@ -3204,7 +3204,7 @@ static int nand_do_read_ops(struct nand_chip *chip, loff_t from,
 			use_bufpoi = 0;
 
 		/* Is the current page in the buffer? */
-		if (realpage != chip->pagebuf || oob) {
+		if (realpage != chip->pagecache.page || oob) {
 			bufpoi = use_bufpoi ? chip->data_buf : buf;
 
 			if (use_bufpoi && aligned)
@@ -3230,7 +3230,7 @@ static int nand_do_read_ops(struct nand_chip *chip, loff_t from,
 			if (ret < 0) {
 				if (use_bufpoi)
 					/* Invalidate page cache */
-					chip->pagebuf = -1;
+					chip->pagecache.page = -1;
 				break;
 			}
 
@@ -3239,11 +3239,11 @@ static int nand_do_read_ops(struct nand_chip *chip, loff_t from,
 				if (!NAND_HAS_SUBPAGE_READ(chip) && !oob &&
 				    !(mtd->ecc_stats.failed - ecc_failures) &&
 				    (ops->mode != MTD_OPS_RAW)) {
-					chip->pagebuf = realpage;
-					chip->pagebuf_bitflips = ret;
+					chip->pagecache.page = realpage;
+					chip->pagecache.bitflips = ret;
 				} else {
 					/* Invalidate page cache */
-					chip->pagebuf = -1;
+					chip->pagecache.page = -1;
 				}
 				memcpy(buf, chip->data_buf + col, bytes);
 			}
@@ -3283,7 +3283,7 @@ static int nand_do_read_ops(struct nand_chip *chip, loff_t from,
 			memcpy(buf, chip->data_buf + col, bytes);
 			buf += bytes;
 			max_bitflips = max_t(unsigned int, max_bitflips,
-					     chip->pagebuf_bitflips);
+					     chip->pagecache.bitflips);
 		}
 
 		readlen -= bytes;
@@ -4002,9 +4002,9 @@ static int nand_do_write_ops(struct nand_chip *chip, loff_t to,
 	page = realpage & chip->pagemask;
 
 	/* Invalidate the page cache, when we write to the cached page */
-	if (to <= ((loff_t)chip->pagebuf << chip->page_shift) &&
-	    ((loff_t)chip->pagebuf << chip->page_shift) < (to + ops->len))
-		chip->pagebuf = -1;
+	if (to <= ((loff_t)chip->pagecache.page << chip->page_shift) &&
+	    ((loff_t)chip->pagecache.page << chip->page_shift) < (to + ops->len))
+		chip->pagecache.page = -1;
 
 	/* Don't allow multipage oob writes with offset */
 	if (oob && ops->ooboffs && (ops->ooboffs + ops->ooblen > oobmaxlen)) {
@@ -4241,9 +4241,9 @@ int nand_erase_nand(struct nand_chip *chip, struct erase_info *instr,
 		 * Invalidate the page cache, if we erase the block which
 		 * contains the current cached page.
 		 */
-		if (page <= chip->pagebuf && chip->pagebuf <
+		if (page <= chip->pagecache.page && chip->pagecache.page <
 		    (page + pages_per_block))
-			chip->pagebuf = -1;
+			chip->pagecache.page = -1;
 
 		if (chip->legacy.erase)
 			status = chip->legacy.erase(chip,
@@ -5821,7 +5821,7 @@ static int nand_scan_tail(struct nand_chip *chip)
 	chip->state = FL_READY;
 
 	/* Invalidate the pagebuffer reference */
-	chip->pagebuf = -1;
+	chip->pagecache.page = -1;
 
 	/* Large page NAND with SOFT_ECC should support subpage reads */
 	switch (ecc->mode) {
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index e62c3ab4e0f7..00a8795b215d 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -1019,10 +1019,10 @@ struct nand_legacy {
  * @chipsize:		[INTERN] the size of one chip for multichip arrays
  * @pagemask:		[INTERN] page number mask = number of (pages / chip) - 1
  * @data_buf:		[INTERN] buffer for data, size is (page size + oobsize).
- * @pagebuf:		[INTERN] holds the pagenumber which is currently in
- *			data_buf.
- * @pagebuf_bitflips:	[INTERN] holds the bitflip count for the page which is
- *			currently in data_buf.
+ * @pagecache:		Structure containing page cache related fields
+ * @pagecache.bitflips:	Number of bitflips of the cached page
+ * @pagecache.page:	Page number currently in the cache. -1 means no page is
+ *			currently cached
  * @subpagesize:	[INTERN] holds the subpagesize
  * @id:			[INTERN] holds NAND ID
  * @parameters:		[INTERN] holds generic parameters under an easily
@@ -1069,8 +1069,12 @@ struct nand_chip {
 	uint64_t chipsize;
 	int pagemask;
 	u8 *data_buf;
-	int pagebuf;
-	unsigned int pagebuf_bitflips;
+
+	struct {
+		unsigned int bitflips;
+		int page;
+	} pagecache;
+
 	int subpagesize;
 	uint8_t bits_per_cell;
 	uint16_t ecc_strength_ds;
@@ -1374,7 +1378,7 @@ void nand_deselect_target(struct nand_chip *chip);
  */
 static inline void *nand_get_data_buf(struct nand_chip *chip)
 {
-	chip->pagebuf = -1;
+	chip->pagecache.page = -1;
 
 	return chip->data_buf;
 }
-- 
2.19.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2019-03-04 20:27 UTC|newest]

Thread overview: 66+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-04 20:15 [PATCH v2 00/15] mtd: rawnand: 5th batch of cleanups Miquel Raynal
2019-03-04 20:15 ` Miquel Raynal
2019-03-04 20:15 ` [PATCH v2 01/15] mtd: nand: Add max_bad_eraseblocks_per_lun info to memorg Miquel Raynal
2019-03-04 20:15   ` Miquel Raynal
2019-06-04  8:01   ` Emil Lenngren
2019-06-04  8:01     ` Emil Lenngren
2019-06-06  8:27     ` Schrempf Frieder
2019-06-06  8:27       ` Schrempf Frieder
2019-06-06  8:39       ` Boris Brezillon
2019-06-06  8:39         ` Boris Brezillon
2019-06-06  8:52         ` Schrempf Frieder
2019-06-06  8:52           ` Schrempf Frieder
2019-06-06  8:57           ` Schrempf Frieder
2019-06-06  8:57             ` Schrempf Frieder
2019-06-06  9:05             ` Boris Brezillon
2019-06-06  9:05               ` Boris Brezillon
2019-06-06 13:06       ` Emil Lenngren
2019-06-06 13:06         ` Emil Lenngren
2019-03-04 20:15 ` [PATCH v2 02/15] mtd: nand: Add a helper returning the number of eraseblocks per target Miquel Raynal
2019-03-04 20:15   ` Miquel Raynal
2019-03-04 20:15 ` [PATCH v2 03/15] mtd: nand: Add a helper to retrieve the number of pages " Miquel Raynal
2019-03-04 20:15   ` Miquel Raynal
2019-03-04 20:15 ` [PATCH v2 04/15] mtd: spinand: Implement mtd->_max_bad_blocks Miquel Raynal
2019-03-04 20:15   ` Miquel Raynal
2019-03-04 20:15 ` [PATCH v2 05/15] mtd: rawnand: Use nand_to_mtd() in nand_{set, get}_flash_node() Miquel Raynal
2019-03-04 20:15   ` Miquel Raynal
2019-03-04 20:15 ` [PATCH v2 06/15] mtd: rawnand: Prepare things to reuse the generic NAND layer Miquel Raynal
2019-03-04 20:15   ` Miquel Raynal
2019-03-04 20:15 ` [PATCH v2 07/15] mtd: rawnand: Fill memorg during detection Miquel Raynal
2019-03-04 20:15   ` Miquel Raynal
2019-03-21  9:03   ` Schrempf Frieder
2019-03-21  9:03     ` Schrempf Frieder
2019-03-04 20:15 ` [PATCH v2 08/15] mtd: rawnand: Initialize the nand_device object Miquel Raynal
2019-03-04 20:15   ` Miquel Raynal
2019-03-04 20:15 ` [PATCH v2 09/15] mtd: rawnand: Provide a helper to get chip->data_buf Miquel Raynal
2019-03-04 20:15   ` Miquel Raynal
2019-03-04 20:15 ` Miquel Raynal [this message]
2019-03-04 20:15   ` [PATCH v2 10/15] mtd: rawnand: Move all page cache related fields to a sub-struct Miquel Raynal
2019-03-04 20:15 ` [PATCH v2 11/15] mtd: rawnand: Use nanddev_mtd_max_bad_blocks() Miquel Raynal
2019-03-04 20:15   ` Miquel Raynal
2019-03-04 20:15 ` [PATCH v2 12/15] mtd: rawnand: Get rid of chip->bits_per_cell Miquel Raynal
2019-03-04 20:15   ` Miquel Raynal
2019-03-04 20:15 ` [PATCH v2 13/15] mtd: rawnand: Get rid of chip->chipsize Miquel Raynal
2019-03-04 20:15   ` Miquel Raynal
2019-03-21  9:03   ` Schrempf Frieder
2019-03-21  9:03     ` Schrempf Frieder
2019-03-04 20:15 ` [PATCH v2 14/15] mtd: rawnand: Get rid of chip->numchips Miquel Raynal
2019-03-04 20:15   ` Miquel Raynal
2019-05-21  6:59   ` Sascha Hauer
2019-05-21  6:59     ` Sascha Hauer
2019-05-21  7:33     ` Boris Brezillon
2019-05-21  7:33       ` Boris Brezillon
2019-05-21  7:43       ` Boris Brezillon
2019-05-21  7:43         ` Boris Brezillon
2019-05-21  7:51       ` Boris Brezillon
2019-05-21  7:51         ` Boris Brezillon
2019-05-21  7:58         ` Sascha Hauer
2019-05-21  7:58           ` Sascha Hauer
2019-05-21  8:01           ` Boris Brezillon
2019-05-21  8:01             ` Boris Brezillon
2019-05-21  7:56       ` Sascha Hauer
2019-05-21  7:56         ` Sascha Hauer
2019-03-04 20:15 ` [PATCH v2 15/15] mtd: rawnand: Get rid of chip->ecc_{strength, step}_ds Miquel Raynal
2019-03-04 20:15   ` Miquel Raynal
2019-04-01 15:28 ` [PATCH v2 00/15] mtd: rawnand: 5th batch of cleanups Miquel Raynal
2019-04-01 15:28   ` Miquel Raynal

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