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From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Subject: [PATCH v5 6/9] drm/i915: Disable PSR2 while getting pipe CRC
Date: Tue,  5 Mar 2019 22:47:25 -0800	[thread overview]
Message-ID: <20190306064728.8234-6-jose.souza@intel.com> (raw)
In-Reply-To: <20190306064728.8234-1-jose.souza@intel.com>

When PSR2 is active aka after the number of frames programmed in
PSR2_CTL 'Frames Before SU Entry' hardware stops to generate CRC
interruptions causing IGT tests to fail due timeout.

This same behavior don't happen with PSR1, as soon as pipe CRC is
enabled it blocks PSR1 activation so CRC calculation continues to
happens normaly.

This patch also set mode_changed as true when PSR is available to
force atomic check functions to compute new PSR state, otherwise PSR2
would not be disabled.

v4: Only setting mode_changed if has_psr is set(Dhinakaran)

v3: Reusing intel_crtc_crc_prepare() and crc_enabled, only setting
mode_changed if it can do PSR.

v2: Changed commit description to describe that PSR2 inhibit CRC
calculations.

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_pipe_crc.c | 1 +
 drivers/gpu/drm/i915/intel_psr.c      | 3 +++
 2 files changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_pipe_crc.c b/drivers/gpu/drm/i915/intel_pipe_crc.c
index af64597c5c6e..c17f02b88453 100644
--- a/drivers/gpu/drm/i915/intel_pipe_crc.c
+++ b/drivers/gpu/drm/i915/intel_pipe_crc.c
@@ -307,6 +307,7 @@ intel_crtc_crc_setup_workarounds(struct intel_crtc *crtc, bool enable)
 		goto put_state;
 	}
 
+	pipe_config->base.mode_changed = pipe_config->has_psr;
 	pipe_config->crc_enabled = enable;
 
 	if (IS_HASWELL(dev_priv) && crtc->pipe == PIPE_A) {
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 2d9f64c362e2..73453d89a841 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -572,6 +572,9 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
 		return false;
 	}
 
+	if (crtc_state->crc_enabled)
+		return false;
+
 	return true;
 }
 
-- 
2.21.0

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  parent reply	other threads:[~2019-03-06  6:47 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-06  6:47 [PATCH v5 1/9] drm/i915/psr: Remove PSR2 FIXME José Roberto de Souza
2019-03-06  6:47 ` [PATCH v5 2/9] drm/i915/psr: Only lookup for enabled CRTCs when forcing a fastset José Roberto de Souza
2019-03-06  6:47 ` [PATCH v5 3/9] drm/i915: Compute and commit color features in fastsets José Roberto de Souza
2019-03-06  6:47 ` [PATCH v5 4/9] drm/i915/psr: Drop test for EDP in CRTC when forcing commit José Roberto de Souza
2019-03-07 20:26   ` Dhinakaran Pandiyan
2019-03-07 22:53     ` Souza, Jose
2019-03-07 22:55       ` Pandiyan, Dhinakaran
2019-03-06  6:47 ` [PATCH v5 5/9] drm/i915/crc: Make IPS workaround generic José Roberto de Souza
2019-03-07 20:18   ` Dhinakaran Pandiyan
2019-03-07 23:02     ` Souza, Jose
2019-03-06  6:47 ` José Roberto de Souza [this message]
2019-03-07 20:47   ` [PATCH v5 6/9] drm/i915: Disable PSR2 while getting pipe CRC Dhinakaran Pandiyan
2019-03-07 23:16     ` Souza, Jose
2019-03-06  6:47 ` [PATCH v5 7/9] drm/i915: Drop redundant checks to update PSR state José Roberto de Souza
2019-03-07 21:03   ` Dhinakaran Pandiyan
2019-03-06  6:47 ` [PATCH v5 8/9] drm/i915: Force PSR exit when getting pipe CRC José Roberto de Souza
2019-03-07 21:25   ` Dhinakaran Pandiyan
2019-03-07 21:57     ` Souza, Jose
2019-03-07 22:30       ` Dhinakaran Pandiyan
2019-03-07 23:46         ` Souza, Jose
2019-03-06  6:47 ` [PATCH v5 9/9] drm/i915: Enable PSR2 by default José Roberto de Souza
2019-03-07 21:33   ` Dhinakaran Pandiyan
2019-03-07 22:01     ` Souza, Jose
2019-03-06  7:17 ` ✗ Fi.CI.SPARSE: warning for series starting with [v5,1/9] drm/i915/psr: Remove PSR2 FIXME Patchwork
2019-03-06  7:43 ` ✓ Fi.CI.BAT: success " Patchwork
2019-03-06 10:30 ` ✗ Fi.CI.IGT: failure " Patchwork

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