[PATCH v3 RESEND 14/24] drm/exynos: unify plane type assignment

[Andrzej Hajda <a.hajda@samsung.com>]

Since all Exynos CRTCs uses the first plane as primary plane and the last
one as cursor plane we can drop custom assignments per CRTC and replace it
with common code.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
---
 drivers/gpu/drm/exynos/exynos5433_drm_decon.c |  7 +------
 drivers/gpu/drm/exynos/exynos7_drm_decon.c    |  7 +------
 drivers/gpu/drm/exynos/exynos_drm_drv.h       |  2 +-
 drivers/gpu/drm/exynos/exynos_drm_fimd.c      | 10 +---------
 drivers/gpu/drm/exynos/exynos_drm_plane.c     | 19 +++++++++++++------
 drivers/gpu/drm/exynos/exynos_drm_vidi.c      |  8 +-------
 drivers/gpu/drm/exynos/exynos_mixer.c         |  6 ++----
 7 files changed, 20 insertions(+), 39 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index 0d409f453923..663446ca2d09 100644
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -78,11 +78,6 @@ static const uint32_t decon_formats[] = {
 	DRM_FORMAT_ARGB8888,
 };
 
-static const enum drm_plane_type decon_win_types[WINDOWS_NR] = {
-	[PRIMARY_WIN] = DRM_PLANE_TYPE_PRIMARY,
-	[CURSON_WIN] = DRM_PLANE_TYPE_CURSOR,
-};
-
 static inline void decon_set_bits(struct decon_context *ctx, u32 reg, u32 mask,
 				  u32 val)
 {
@@ -619,7 +614,7 @@ static int decon_bind(struct device *dev, struct device *master, void *data)
 					| EXYNOS_DRM_PLANE_CAP_PIX_BLEND;
 		ret = exynos_plane_init(drm_dev, &ctx->planes[i],
 			decon_formats, ARRAY_SIZE(decon_formats),
-			decon_win_types[i]);
+			WINDOWS_NR - ctx->first_win);
 		if (ret)
 			return ret;
 	}
diff --git a/drivers/gpu/drm/exynos/exynos7_drm_decon.c b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
index 22659f2da755..b6ad2faed159 100644
--- a/drivers/gpu/drm/exynos/exynos7_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
@@ -78,11 +78,6 @@ static const uint32_t decon_formats[] = {
 	DRM_FORMAT_BGRA8888,
 };
 
-static const enum drm_plane_type decon_win_types[WINDOWS_NR] = {
-	DRM_PLANE_TYPE_PRIMARY,
-	DRM_PLANE_TYPE_CURSOR,
-};
-
 static void decon_wait_for_vblank(struct exynos_drm_crtc *crtc)
 {
 	struct decon_context *ctx = to_decon(crtc);
@@ -628,7 +623,7 @@ static int decon_bind(struct device *dev, struct device *master, void *data)
 	for (i = 0; i < WINDOWS_NR; i++) {
 		ctx->planes[i].index = i;
 		ret = exynos_plane_init(drm_dev, &ctx->planes[i], decon_formats,
-			ARRAY_SIZE(decon_formats), decon_win_types[i]);
+			ARRAY_SIZE(decon_formats), WINDOWS_NR);
 		if (ret)
 			return ret;
 	}
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h
index 82af112be03d..23b27b82de6e 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h
@@ -97,7 +97,7 @@ struct exynos_drm_plane {
 
 int exynos_plane_init(struct drm_device *dev, struct exynos_drm_plane *plane,
 		      const uint32_t *pixel_formats, int num_pixel_formats,
-		      enum drm_plane_type type);
+		      int win_count);
 
 /*
  * Exynos drm crtc ops
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 8ea1cfd51736..b3c11bca5aed 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -212,14 +212,6 @@ static const struct of_device_id fimd_driver_dt_match[] = {
 };
 MODULE_DEVICE_TABLE(of, fimd_driver_dt_match);
 
-static const enum drm_plane_type fimd_win_types[WINDOWS_NR] = {
-	DRM_PLANE_TYPE_PRIMARY,
-	DRM_PLANE_TYPE_OVERLAY,
-	DRM_PLANE_TYPE_OVERLAY,
-	DRM_PLANE_TYPE_OVERLAY,
-	DRM_PLANE_TYPE_CURSOR,
-};
-
 static const uint32_t fimd_formats[] = {
 	DRM_FORMAT_C8,
 	DRM_FORMAT_XRGB1555,
@@ -1049,7 +1041,7 @@ static int fimd_bind(struct device *dev, struct device *master, void *data)
 					    | EXYNOS_DRM_PLANE_CAP_WIN_BLEND
 					    | EXYNOS_DRM_PLANE_CAP_PIX_BLEND;
 		ret = exynos_plane_init(drm_dev, &ctx->planes[i], fimd_formats,
-				ARRAY_SIZE(fimd_formats), fimd_win_types[i]);
+				ARRAY_SIZE(fimd_formats), WINDOWS_NR);
 		if (ret)
 			return ret;
 	}
diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c b/drivers/gpu/drm/exynos/exynos_drm_plane.c
index e1aa504539fa..5f8f56b69369 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_plane.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c
@@ -291,9 +291,18 @@ static void exynos_plane_attach_zpos_property(struct drm_plane *plane,
 		drm_plane_create_zpos_property(plane, zpos, 0, MAX_PLANE - 1);
 }
 
+static inline enum drm_plane_type exynos_plane_type(int index, int count)
+{
+	if (count && !index)
+		return DRM_PLANE_TYPE_PRIMARY;
+	if (index == count - 1)
+		return DRM_PLANE_TYPE_CURSOR;
+	return DRM_PLANE_TYPE_OVERLAY;
+}
+
 int exynos_plane_init(struct drm_device *dev, struct exynos_drm_plane *plane,
 		      const uint32_t *pixel_formats, int num_pixel_formats,
-		      enum drm_plane_type type)
+		      int win_count)
 {
 	int err;
 	unsigned int supported_modes = BIT(DRM_MODE_BLEND_PIXEL_NONE) |
@@ -302,11 +311,9 @@ int exynos_plane_init(struct drm_device *dev, struct exynos_drm_plane *plane,
 	struct drm_plane *bplane = &plane->base;
 
 	err = drm_universal_plane_init(dev, bplane,
-				       1 << dev->mode_config.num_crtc,
-				       &exynos_plane_funcs,
-				       pixel_formats,
-				       num_pixel_formats,
-				       NULL, type, NULL);
+		1 << dev->mode_config.num_crtc,
+		&exynos_plane_funcs, pixel_formats, num_pixel_formats,NULL,
+		exynos_plane_type(plane->index, win_count), NULL);
 	if (err) {
 		DRM_ERROR("failed to initialize plane\n");
 		return err;
diff --git a/drivers/gpu/drm/exynos/exynos_drm_vidi.c b/drivers/gpu/drm/exynos/exynos_drm_vidi.c
index 2579462aec70..eb1fd3a2cdf3 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_vidi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_vidi.c
@@ -85,12 +85,6 @@ static const uint32_t formats[] = {
 	DRM_FORMAT_NV12,
 };
 
-static const enum drm_plane_type vidi_win_types[WINDOWS_NR] = {
-	DRM_PLANE_TYPE_PRIMARY,
-	DRM_PLANE_TYPE_OVERLAY,
-	DRM_PLANE_TYPE_CURSOR,
-};
-
 static int vidi_enable_vblank(struct exynos_drm_crtc *crtc)
 {
 	struct vidi_context *ctx = to_vidi(crtc);
@@ -381,7 +375,7 @@ static int vidi_bind(struct device *dev, struct device *master, void *data)
 
 	for (i = 0; i < WINDOWS_NR; i++) {
 		ret = exynos_plane_init(drm_dev, &ctx->planes[i], formats,
-				        ARRAY_SIZE(formats), vidi_win_types[i]);
+				        ARRAY_SIZE(formats), WINDOWS_NR);
 		if (ret)
 			return ret;
 	}
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c
index 7fcefcbe68db..a61fb2069e32 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -1143,8 +1143,6 @@ static int mixer_bind(struct device *dev, struct device *manager, void *data)
 	struct drm_device *drm_dev = data;
 	unsigned int i;
 	int ret;
-	static enum drm_plane_type types[] = { DRM_PLANE_TYPE_PRIMARY,
-		DRM_PLANE_TYPE_CURSOR, DRM_PLANE_TYPE_OVERLAY };
 
 	ret = mixer_initialize(ctx, drm_dev);
 	if (ret)
@@ -1157,7 +1155,7 @@ static int mixer_bind(struct device *dev, struct device *manager, void *data)
 					      EXYNOS_DRM_PLANE_CAP_PIX_BLEND |
 					      EXYNOS_DRM_PLANE_CAP_WIN_BLEND;
 		ret = exynos_plane_init(drm_dev, &ctx->planes[i], mixer_formats,
-			ARRAY_SIZE(mixer_formats), types[i]);
+			ARRAY_SIZE(mixer_formats), VP_DEFAULT_WIN);
 		if (ret)
 			return ret;
 	}
@@ -1169,7 +1167,7 @@ static int mixer_bind(struct device *dev, struct device *manager, void *data)
 					      EXYNOS_DRM_PLANE_CAP_TILE |
 					      EXYNOS_DRM_PLANE_CAP_WIN_BLEND;
 		ret = exynos_plane_init(drm_dev, &ctx->planes[i], vp_formats,
-			ARRAY_SIZE(vp_formats), types[i]);
+			ARRAY_SIZE(vp_formats), VP_DEFAULT_WIN);
 		if (ret)
 			return ret;
 	}
-- 
2.17.1

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