From: Kishon Vijay Abraham I <kishon@ti.com>
To: Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Rob Herring <robh+dt@kernel.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Arnd Bergmann <arnd@arndb.de>,
Murali Karicheri <m-karicheri2@ti.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>,
Jingoo Han <jingoohan1@gmail.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
<linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-omap@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-arm-kernel@axis.com>
Subject: [PATCH v2 03/26] dt-bindings: PCI: keystone: Add "reg-names" binding information
Date: Mon, 25 Mar 2019 14:04:38 +0530 [thread overview]
Message-ID: <20190325083501.8088-4-kishon@ti.com> (raw)
In-Reply-To: <20190325083501.8088-1-kishon@ti.com>
Add "reg-names" binding information in order for device tree node
to be populated with the correct register strings. This will break
old dt compatibility. However Keystone PCI has never worked
in upstream kernel due to lack of SERDES support. Before SERDES
support is added, cleanup the Keystone PCI dt-bindngs. This new
binding will also be used by PCI in AM654 platform.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
Documentation/devicetree/bindings/pci/pci-keystone.txt | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/pci-keystone.txt b/Documentation/devicetree/bindings/pci/pci-keystone.txt
index 2030ee0dc4f9..3a551687cfa2 100644
--- a/Documentation/devicetree/bindings/pci/pci-keystone.txt
+++ b/Documentation/devicetree/bindings/pci/pci-keystone.txt
@@ -12,8 +12,10 @@ described here as well as properties that are not applicable.
Required Properties:-
compatibility: "ti,keystone-pcie"
-reg: index 1 is the base address and length of DW application registers.
- index 2 is the base address and length of PCI device ID register.
+reg: Three register ranges as listed in the reg-names property
+reg-names: "dbics" for the DesignWare PCIe registers, "app" for the
+ TI specific application registers, "config" for the
+ configuration space address
pcie_msi_intc : Interrupt controller device node for MSI IRQ chip
interrupt-cells: should be set to 1
--
2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Kishon Vijay Abraham I <kishon@ti.com>
To: Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Rob Herring <robh+dt@kernel.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Arnd Bergmann <arnd@arndb.de>,
Murali Karicheri <m-karicheri2@ti.com>
Cc: devicetree@vger.kernel.org,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jingoo Han <jingoohan1@gmail.com>,
linux-kernel@vger.kernel.org, linux-arm-kernel@axis.com,
Kishon Vijay Abraham I <kishon@ti.com>,
linux-pci@vger.kernel.org, linux-omap@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 03/26] dt-bindings: PCI: keystone: Add "reg-names" binding information
Date: Mon, 25 Mar 2019 14:04:38 +0530 [thread overview]
Message-ID: <20190325083501.8088-4-kishon@ti.com> (raw)
In-Reply-To: <20190325083501.8088-1-kishon@ti.com>
Add "reg-names" binding information in order for device tree node
to be populated with the correct register strings. This will break
old dt compatibility. However Keystone PCI has never worked
in upstream kernel due to lack of SERDES support. Before SERDES
support is added, cleanup the Keystone PCI dt-bindngs. This new
binding will also be used by PCI in AM654 platform.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
Documentation/devicetree/bindings/pci/pci-keystone.txt | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/pci-keystone.txt b/Documentation/devicetree/bindings/pci/pci-keystone.txt
index 2030ee0dc4f9..3a551687cfa2 100644
--- a/Documentation/devicetree/bindings/pci/pci-keystone.txt
+++ b/Documentation/devicetree/bindings/pci/pci-keystone.txt
@@ -12,8 +12,10 @@ described here as well as properties that are not applicable.
Required Properties:-
compatibility: "ti,keystone-pcie"
-reg: index 1 is the base address and length of DW application registers.
- index 2 is the base address and length of PCI device ID register.
+reg: Three register ranges as listed in the reg-names property
+reg-names: "dbics" for the DesignWare PCIe registers, "app" for the
+ TI specific application registers, "config" for the
+ configuration space address
pcie_msi_intc : Interrupt controller device node for MSI IRQ chip
interrupt-cells: should be set to 1
--
2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Kishon Vijay Abraham I <kishon@ti.com>
To: Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Rob Herring <robh+dt@kernel.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Arnd Bergmann <arnd@arndb.de>,
Murali Karicheri <m-karicheri2@ti.com>
Cc: devicetree@vger.kernel.org,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jingoo Han <jingoohan1@gmail.com>,
linux-kernel@vger.kernel.org, linux-arm-kernel@axis.com,
Kishon Vijay Abraham I <kishon@ti.com>,
linux-pci@vger.kernel.org, linux-omap@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 03/26] dt-bindings: PCI: keystone: Add "reg-names" binding information
Date: Mon, 25 Mar 2019 14:04:38 +0530 [thread overview]
Message-ID: <20190325083501.8088-4-kishon@ti.com> (raw)
In-Reply-To: <20190325083501.8088-1-kishon@ti.com>
Add "reg-names" binding information in order for device tree node
to be populated with the correct register strings. This will break
old dt compatibility. However Keystone PCI has never worked
in upstream kernel due to lack of SERDES support. Before SERDES
support is added, cleanup the Keystone PCI dt-bindngs. This new
binding will also be used by PCI in AM654 platform.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
Documentation/devicetree/bindings/pci/pci-keystone.txt | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/pci-keystone.txt b/Documentation/devicetree/bindings/pci/pci-keystone.txt
index 2030ee0dc4f9..3a551687cfa2 100644
--- a/Documentation/devicetree/bindings/pci/pci-keystone.txt
+++ b/Documentation/devicetree/bindings/pci/pci-keystone.txt
@@ -12,8 +12,10 @@ described here as well as properties that are not applicable.
Required Properties:-
compatibility: "ti,keystone-pcie"
-reg: index 1 is the base address and length of DW application registers.
- index 2 is the base address and length of PCI device ID register.
+reg: Three register ranges as listed in the reg-names property
+reg-names: "dbics" for the DesignWare PCIe registers, "app" for the
+ TI specific application registers, "config" for the
+ configuration space address
pcie_msi_intc : Interrupt controller device node for MSI IRQ chip
interrupt-cells: should be set to 1
--
2.17.1
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next prev parent reply other threads:[~2019-03-25 8:39 UTC|newest]
Thread overview: 94+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-25 8:34 [PATCH v2 00/26] Add support for PCIe RC and EP mode in TI's AM654 SoC Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` [PATCH v2 01/26] PCI: keystone: Add start_link/stop_link dw_pcie_ops Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` [PATCH v2 02/26] PCI: keystone: Cleanup error_irq configuration Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I [this message]
2019-03-25 8:34 ` [PATCH v2 03/26] dt-bindings: PCI: keystone: Add "reg-names" binding information Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` [PATCH v2 04/26] PCI: keystone: Perform host initialization in a single function Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` [PATCH v2 05/26] PCI: keystone: Use platform_get_resource_byname to get memory resources Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` [PATCH v2 06/26] PCI: keystone: Move initializations to appropriate places Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-04-13 14:30 ` Bjorn Helgaas
2019-04-13 14:30 ` Bjorn Helgaas
2019-04-15 5:34 ` Kishon Vijay Abraham I
2019-04-15 5:34 ` Kishon Vijay Abraham I
2019-04-15 12:25 ` Lorenzo Pieralisi
2019-04-15 12:25 ` Lorenzo Pieralisi
2019-03-25 8:34 ` [PATCH v2 07/26] dt-bindings: PCI: Add dt-binding to configure PCIe mode Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` [PATCH v2 08/26] PCI: keystone: Explicitly set the " Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` [PATCH v2 09/26] dt-bindings: PCI: Document "atu" reg-names Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` [PATCH v2 10/26] PCI: dwc: Enable iATU unroll for endpoint too Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` [PATCH v2 11/26] PCI: dwc: Fix ATU identification for designware version >= 4.80 Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` [PATCH v2 12/26] PCI: keystone: Prevent ARM32 specific code to be compiled for ARM64 Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` [PATCH v2 13/26] dt-bindings: PCI: Add PCI RC dt binding documentation for AM654 Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` [PATCH v2 14/26] PCI: keystone: Add support for PCIe RC in AM654x Platforms Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` [PATCH v2 15/26] PCI: keystone: Invoke phy_reset API before enabling PHY Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` [PATCH v2 16/26] PCI: OF: Allow of_pci_get_max_link_speed() to be used by PCI Endpoint drivers Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` [PATCH v2 17/26] PCI: keystone: Add support to set the max link speed from DT Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` [PATCH v2 18/26] PCI: endpoint: Add support to allocate aligned buffers to be mapped in BARs Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` [PATCH v2 19/26] PCI: dwc: Add const qualifier to struct dw_pcie_ep_ops Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` [PATCH v2 20/26] PCI: dwc: Fix dw_pcie_ep_find_capability to return correct capability offset Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` [PATCH v2 21/26] PCI: dwc: Add callbacks for accessing dbi2 address space Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` [PATCH v2 22/26] PCI: keystone: Add support for PCIe EP in AM654x Platforms Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` [PATCH v2 23/26] PCI: designware-ep: Configure RESBAR to advertise the smallest size Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-04-13 16:00 ` Bjorn Helgaas
2019-04-13 16:00 ` Bjorn Helgaas
2019-04-16 13:36 ` Lorenzo Pieralisi
2019-04-16 13:36 ` Lorenzo Pieralisi
2019-03-25 8:34 ` [PATCH v2 24/26] PCI: designware-ep: Use aligned ATU window for raising MSI interrupts Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:34 ` Kishon Vijay Abraham I
2019-03-25 8:35 ` [PATCH v2 25/26] misc: pci_endpoint_test: Add support to test PCI EP in AM654x Kishon Vijay Abraham I
2019-03-25 8:35 ` Kishon Vijay Abraham I
2019-03-25 8:35 ` Kishon Vijay Abraham I
2019-03-25 8:35 ` [PATCH v2 26/26] misc: pci_endpoint_test: Fix test_reg_bar to be updated in pci_endpoint_test Kishon Vijay Abraham I
2019-03-25 8:35 ` Kishon Vijay Abraham I
2019-03-25 8:35 ` Kishon Vijay Abraham I
2019-03-25 9:36 ` [PATCH v2 00/26] Add support for PCIe RC and EP mode in TI's AM654 SoC Kishon Vijay Abraham I
2019-03-25 9:36 ` Kishon Vijay Abraham I
2019-03-25 9:36 ` Kishon Vijay Abraham I
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