From: Boris Brezillon <boris.brezillon@collabora.com> To: Mauro Carvalho Chehab <mchehab@kernel.org>, Hans Verkuil <hans.verkuil@cisco.com>, Laurent Pinchart <laurent.pinchart@ideasonboard.com>, Sakari Ailus <sakari.ailus@iki.fi>, linux-media@vger.kernel.org Cc: Tomasz Figa <tfiga@chromium.org>, Nicolas Dufresne <nicolas@ndufresne.ca>, kernel@collabora.com, Paul Kocialkowski <paul.kocialkowski@bootlin.com>, Ezequiel Garcia <ezequiel@collabora.com>, Jonas Karlman <jonas@kwiboo.se>, linux-rockchip@lists.infradead.org, Heiko Stuebner <heiko@sntech.de>, Boris Brezillon <boris.brezillon@collabora.com> Subject: [PATCH v5 09/15] rockchip/vpu: Provide a helper to reset both src and dst formats Date: Fri, 3 May 2019 13:47:13 +0200 [thread overview] Message-ID: <20190503114719.28784-10-boris.brezillon@collabora.com> (raw) In-Reply-To: <20190503114719.28784-1-boris.brezillon@collabora.com> When initializing a context, the core wants to reset both src and dst formats. Right now the order doesn't matter, but if we want to have a valid default width/height on the non-coded/raw format side (src in case of encoders, dst in case of decoders), we need to reset those formats in the right order: first the coded-format side, then the other, such that width and height on the raw format side can be taken from the coded format. Let's provide a helper that will reset both formats and make sure this is done in the right order. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> --- Changes from v2: * None Changes from v2: * New patch --- .../staging/media/rockchip/vpu/rockchip_vpu_drv.c | 3 +-- .../staging/media/rockchip/vpu/rockchip_vpu_v4l2.c | 14 ++++++++++---- .../staging/media/rockchip/vpu/rockchip_vpu_v4l2.h | 5 +---- 3 files changed, 12 insertions(+), 10 deletions(-) diff --git a/drivers/staging/media/rockchip/vpu/rockchip_vpu_drv.c b/drivers/staging/media/rockchip/vpu/rockchip_vpu_drv.c index ec18578d55d7..d85b88067b03 100644 --- a/drivers/staging/media/rockchip/vpu/rockchip_vpu_drv.c +++ b/drivers/staging/media/rockchip/vpu/rockchip_vpu_drv.c @@ -273,8 +273,7 @@ static int rockchip_vpu_open(struct file *filp) filp->private_data = &ctx->fh; v4l2_fh_add(&ctx->fh); - rockchip_vpu_reset_dst_fmt(vpu, ctx); - rockchip_vpu_reset_src_fmt(vpu, ctx); + rockchip_vpu_reset_fmts(ctx); ret = rockchip_vpu_ctrls_setup(vpu, ctx); if (ret) { diff --git a/drivers/staging/media/rockchip/vpu/rockchip_vpu_v4l2.c b/drivers/staging/media/rockchip/vpu/rockchip_vpu_v4l2.c index 3e8f6256e0ed..e30056dc6758 100644 --- a/drivers/staging/media/rockchip/vpu/rockchip_vpu_v4l2.c +++ b/drivers/staging/media/rockchip/vpu/rockchip_vpu_v4l2.c @@ -250,8 +250,8 @@ vidioc_try_fmt_out_mplane(struct file *file, void *priv, struct v4l2_format *f) return 0; } -void rockchip_vpu_reset_dst_fmt(struct rockchip_vpu_dev *vpu, - struct rockchip_vpu_ctx *ctx) +static void rockchip_vpu_reset_dst_fmt(struct rockchip_vpu_dev *vpu, + struct rockchip_vpu_ctx *ctx) { struct v4l2_pix_format_mplane *fmt = &ctx->dst_fmt; @@ -273,8 +273,8 @@ void rockchip_vpu_reset_dst_fmt(struct rockchip_vpu_dev *vpu, fmt->width * fmt->height * ctx->vpu_dst_fmt->max_depth; } -void rockchip_vpu_reset_src_fmt(struct rockchip_vpu_dev *vpu, - struct rockchip_vpu_ctx *ctx) +static void rockchip_vpu_reset_src_fmt(struct rockchip_vpu_dev *vpu, + struct rockchip_vpu_ctx *ctx) { struct v4l2_pix_format_mplane *fmt = &ctx->src_fmt; @@ -294,6 +294,12 @@ void rockchip_vpu_reset_src_fmt(struct rockchip_vpu_dev *vpu, fmt->height); } +void rockchip_vpu_reset_fmts(struct rockchip_vpu_ctx *ctx) +{ + rockchip_vpu_reset_dst_fmt(ctx->dev, ctx); + rockchip_vpu_reset_src_fmt(ctx->dev, ctx); +} + static int vidioc_s_fmt_out_mplane(struct file *file, void *priv, struct v4l2_format *f) { diff --git a/drivers/staging/media/rockchip/vpu/rockchip_vpu_v4l2.h b/drivers/staging/media/rockchip/vpu/rockchip_vpu_v4l2.h index 816bd3988218..493e8751d22d 100644 --- a/drivers/staging/media/rockchip/vpu/rockchip_vpu_v4l2.h +++ b/drivers/staging/media/rockchip/vpu/rockchip_vpu_v4l2.h @@ -21,9 +21,6 @@ extern const struct v4l2_ioctl_ops rockchip_vpu_ioctl_ops; extern const struct vb2_ops rockchip_vpu_queue_ops; -void rockchip_vpu_reset_src_fmt(struct rockchip_vpu_dev *vpu, - struct rockchip_vpu_ctx *ctx); -void rockchip_vpu_reset_dst_fmt(struct rockchip_vpu_dev *vpu, - struct rockchip_vpu_ctx *ctx); +void rockchip_vpu_reset_fmts(struct rockchip_vpu_ctx *ctx); #endif /* ROCKCHIP_VPU_V4L2_H_ */ -- 2.20.1
WARNING: multiple messages have this Message-ID (diff)
From: Boris Brezillon <boris.brezillon-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org> To: Mauro Carvalho Chehab <mchehab-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>, Hans Verkuil <hans.verkuil-FYB4Gu1CFyUAvxtiuMwx3w@public.gmane.org>, Laurent Pinchart <laurent.pinchart-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org>, Sakari Ailus <sakari.ailus-X3B1VOXEql0@public.gmane.org>, linux-media-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Cc: Tomasz Figa <tfiga-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>, Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>, Jonas Karlman <jonas-uIzNG4q0ceqzQB+pC5nmwQ@public.gmane.org>, Nicolas Dufresne <nicolas-dDhyB4GVkw9AFePFGvp55w@public.gmane.org>, Paul Kocialkowski <paul.kocialkowski-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Boris Brezillon <boris.brezillon-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>, kernel-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org, Ezequiel Garcia <ezequiel-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org> Subject: [PATCH v5 09/15] rockchip/vpu: Provide a helper to reset both src and dst formats Date: Fri, 3 May 2019 13:47:13 +0200 [thread overview] Message-ID: <20190503114719.28784-10-boris.brezillon@collabora.com> (raw) In-Reply-To: <20190503114719.28784-1-boris.brezillon-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org> When initializing a context, the core wants to reset both src and dst formats. Right now the order doesn't matter, but if we want to have a valid default width/height on the non-coded/raw format side (src in case of encoders, dst in case of decoders), we need to reset those formats in the right order: first the coded-format side, then the other, such that width and height on the raw format side can be taken from the coded format. Let's provide a helper that will reset both formats and make sure this is done in the right order. Signed-off-by: Boris Brezillon <boris.brezillon-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org> --- Changes from v2: * None Changes from v2: * New patch --- .../staging/media/rockchip/vpu/rockchip_vpu_drv.c | 3 +-- .../staging/media/rockchip/vpu/rockchip_vpu_v4l2.c | 14 ++++++++++---- .../staging/media/rockchip/vpu/rockchip_vpu_v4l2.h | 5 +---- 3 files changed, 12 insertions(+), 10 deletions(-) diff --git a/drivers/staging/media/rockchip/vpu/rockchip_vpu_drv.c b/drivers/staging/media/rockchip/vpu/rockchip_vpu_drv.c index ec18578d55d7..d85b88067b03 100644 --- a/drivers/staging/media/rockchip/vpu/rockchip_vpu_drv.c +++ b/drivers/staging/media/rockchip/vpu/rockchip_vpu_drv.c @@ -273,8 +273,7 @@ static int rockchip_vpu_open(struct file *filp) filp->private_data = &ctx->fh; v4l2_fh_add(&ctx->fh); - rockchip_vpu_reset_dst_fmt(vpu, ctx); - rockchip_vpu_reset_src_fmt(vpu, ctx); + rockchip_vpu_reset_fmts(ctx); ret = rockchip_vpu_ctrls_setup(vpu, ctx); if (ret) { diff --git a/drivers/staging/media/rockchip/vpu/rockchip_vpu_v4l2.c b/drivers/staging/media/rockchip/vpu/rockchip_vpu_v4l2.c index 3e8f6256e0ed..e30056dc6758 100644 --- a/drivers/staging/media/rockchip/vpu/rockchip_vpu_v4l2.c +++ b/drivers/staging/media/rockchip/vpu/rockchip_vpu_v4l2.c @@ -250,8 +250,8 @@ vidioc_try_fmt_out_mplane(struct file *file, void *priv, struct v4l2_format *f) return 0; } -void rockchip_vpu_reset_dst_fmt(struct rockchip_vpu_dev *vpu, - struct rockchip_vpu_ctx *ctx) +static void rockchip_vpu_reset_dst_fmt(struct rockchip_vpu_dev *vpu, + struct rockchip_vpu_ctx *ctx) { struct v4l2_pix_format_mplane *fmt = &ctx->dst_fmt; @@ -273,8 +273,8 @@ void rockchip_vpu_reset_dst_fmt(struct rockchip_vpu_dev *vpu, fmt->width * fmt->height * ctx->vpu_dst_fmt->max_depth; } -void rockchip_vpu_reset_src_fmt(struct rockchip_vpu_dev *vpu, - struct rockchip_vpu_ctx *ctx) +static void rockchip_vpu_reset_src_fmt(struct rockchip_vpu_dev *vpu, + struct rockchip_vpu_ctx *ctx) { struct v4l2_pix_format_mplane *fmt = &ctx->src_fmt; @@ -294,6 +294,12 @@ void rockchip_vpu_reset_src_fmt(struct rockchip_vpu_dev *vpu, fmt->height); } +void rockchip_vpu_reset_fmts(struct rockchip_vpu_ctx *ctx) +{ + rockchip_vpu_reset_dst_fmt(ctx->dev, ctx); + rockchip_vpu_reset_src_fmt(ctx->dev, ctx); +} + static int vidioc_s_fmt_out_mplane(struct file *file, void *priv, struct v4l2_format *f) { diff --git a/drivers/staging/media/rockchip/vpu/rockchip_vpu_v4l2.h b/drivers/staging/media/rockchip/vpu/rockchip_vpu_v4l2.h index 816bd3988218..493e8751d22d 100644 --- a/drivers/staging/media/rockchip/vpu/rockchip_vpu_v4l2.h +++ b/drivers/staging/media/rockchip/vpu/rockchip_vpu_v4l2.h @@ -21,9 +21,6 @@ extern const struct v4l2_ioctl_ops rockchip_vpu_ioctl_ops; extern const struct vb2_ops rockchip_vpu_queue_ops; -void rockchip_vpu_reset_src_fmt(struct rockchip_vpu_dev *vpu, - struct rockchip_vpu_ctx *ctx); -void rockchip_vpu_reset_dst_fmt(struct rockchip_vpu_dev *vpu, - struct rockchip_vpu_ctx *ctx); +void rockchip_vpu_reset_fmts(struct rockchip_vpu_ctx *ctx); #endif /* ROCKCHIP_VPU_V4L2_H_ */ -- 2.20.1
next prev parent reply other threads:[~2019-05-03 11:47 UTC|newest] Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-05-03 11:47 [PATCH v5 00/15] Add MPEG-2 decoding to Rockchip VPU Boris Brezillon 2019-05-03 11:47 ` Boris Brezillon 2019-05-03 11:47 ` [PATCH v5 01/15] media: v4l2-common: Fix v4l2_fill_pixfmt[_mp]() prototypes Boris Brezillon 2019-05-03 11:47 ` Boris Brezillon 2019-05-03 11:47 ` [PATCH v5 02/15] media: v4l2-common: Add an helper to apply frmsize constraints Boris Brezillon 2019-05-03 11:47 ` Boris Brezillon 2019-05-03 11:47 ` [PATCH v5 03/15] media: v4l2-common: Support custom imagesize/bytesperline in fill_pixfmt() Boris Brezillon 2019-05-03 11:47 ` Boris Brezillon 2019-05-10 8:57 ` Hans Verkuil 2019-05-10 8:57 ` Hans Verkuil 2019-05-10 11:28 ` Laurent Pinchart 2019-05-10 11:28 ` Laurent Pinchart 2019-05-10 12:17 ` Hans Verkuil 2019-05-10 12:17 ` Hans Verkuil 2019-05-10 12:24 ` Laurent Pinchart 2019-05-10 12:24 ` Laurent Pinchart 2019-05-10 12:30 ` Hans Verkuil 2019-05-10 12:30 ` Hans Verkuil 2019-05-10 13:51 ` Nicolas Dufresne 2019-05-10 13:51 ` Nicolas Dufresne 2019-05-10 14:07 ` Hans Verkuil 2019-05-10 14:07 ` Hans Verkuil 2019-05-10 16:01 ` Nicolas Dufresne 2019-05-10 16:01 ` Nicolas Dufresne 2019-05-03 11:47 ` [PATCH v5 04/15] rockchip/vpu: Use v4l2_apply_frmsize_constraints() where appropriate Boris Brezillon 2019-05-03 11:47 ` Boris Brezillon 2019-05-03 11:47 ` [PATCH v5 05/15] rockchip/vpu: Open-code media controller register Boris Brezillon 2019-05-03 11:47 ` Boris Brezillon 2019-05-03 11:47 ` [PATCH v5 06/15] rockchip/vpu: Support the Request API Boris Brezillon 2019-05-03 11:47 ` Boris Brezillon 2019-05-03 11:47 ` [PATCH v5 07/15] rockchip/vpu: Rename rockchip_vpu_common.h into rockchip_vpu_v4l2.h Boris Brezillon 2019-05-03 11:47 ` Boris Brezillon 2019-05-03 11:47 ` [PATCH v5 08/15] rockchip/vpu: Move encoder logic to a common place Boris Brezillon 2019-05-03 11:47 ` Boris Brezillon 2019-05-03 11:47 ` Boris Brezillon [this message] 2019-05-03 11:47 ` [PATCH v5 09/15] rockchip/vpu: Provide a helper to reset both src and dst formats Boris Brezillon 2019-05-03 11:47 ` [PATCH v5 10/15] rockchip/vpu: Prepare things to support decoders Boris Brezillon 2019-05-03 11:47 ` Boris Brezillon 2019-05-03 11:47 ` [PATCH v5 11/15] rockchip/vpu: Add decoder boilerplate Boris Brezillon 2019-05-03 11:47 ` Boris Brezillon 2019-05-03 11:47 ` [PATCH v5 12/15] rockchip/vpu: Add support for non-standard controls Boris Brezillon 2019-05-03 11:47 ` Boris Brezillon 2019-05-03 11:47 ` [PATCH v5 13/15] rockchip/vpu: Add infra to support MPEG-2 decoding Boris Brezillon 2019-05-03 11:47 ` Boris Brezillon 2019-05-03 11:47 ` [PATCH v5 14/15] rockchip/vpu: Add MPEG2 decoding support to RK3399 Boris Brezillon 2019-05-03 11:47 ` Boris Brezillon 2019-05-03 11:47 ` [PATCH v5 15/15] rockchip/vpu: Add support for MPEG-2 decoding on RK3288 Boris Brezillon 2019-05-03 11:47 ` Boris Brezillon
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