From: Yang Weijiang <weijiang.yang@intel.com>
To: pbonzini@redhat.com, sean.j.christopherson@intel.com,
mst@redhat.com, rkrcmar@redhat.com, jmattson@google.com,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
yu-cheng.yu@intel.com
Cc: weijiang.yang@intel.com
Subject: [PATCH v5 3/8] KVM: x86: Fix XSAVE size calculation issue
Date: Wed, 22 May 2019 15:00:56 +0800 [thread overview]
Message-ID: <20190522070101.7636-4-weijiang.yang@intel.com> (raw)
In-Reply-To: <20190522070101.7636-1-weijiang.yang@intel.com>
According to the SDM, Vol 2, CPUID(EAX=0xD,ECX=1) reports the
XSAVE size containing all states enabled by XCR0|IA32_MSR_XSS.
Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
Co-developed-by: Zhang Yi Z <yi.z.zhang@linux.intel.com>
---
arch/x86/kvm/cpuid.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index b9fc967fe55a..7be16ef0ea4a 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -123,7 +123,8 @@ int kvm_update_cpuid(struct kvm_vcpu *vcpu)
best = kvm_find_cpuid_entry(vcpu, 0xD, 1);
if (best && (best->eax & (F(XSAVES) | F(XSAVEC))))
- best->ebx = xstate_required_size(vcpu->arch.xcr0, true);
+ best->ebx = xstate_required_size(vcpu->arch.xcr0 |
+ kvm_supported_xss(), true);
/*
* The existing code assumes virtual address is 48-bit or 57-bit in the
--
2.17.2
next prev parent reply other threads:[~2019-05-22 7:02 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-22 7:00 [PATCH v5 0/8] Introduce support for Guest CET feature Yang Weijiang
2019-05-22 7:00 ` [PATCH v5 1/8] KVM: VMX: Define CET VMCS fields and control bits Yang Weijiang
2019-06-04 14:46 ` Sean Christopherson
2019-06-05 2:30 ` Yang Weijiang
2019-05-22 7:00 ` [PATCH v5 2/8] KVM: x86: Implement CET CPUID support for Guest Yang Weijiang
2019-06-04 19:58 ` Sean Christopherson
2019-06-05 2:51 ` Yang Weijiang
2019-05-22 7:00 ` Yang Weijiang [this message]
2019-05-22 7:00 ` [PATCH v5 4/8] KVM: VMX: Pass through CET related MSRs to Guest Yang Weijiang
2019-06-04 19:59 ` Sean Christopherson
2019-05-22 7:00 ` [PATCH v5 5/8] KVM: VMX: Load Guest CET via VMCS when CET is enabled in Guest Yang Weijiang
2019-06-04 20:03 ` Sean Christopherson
2019-06-05 1:49 ` Yang Weijiang
2019-05-22 7:00 ` [PATCH v5 6/8] KVM: x86: Allow Guest to set supported bits in XSS Yang Weijiang
2019-05-22 7:01 ` [PATCH v5 7/8] KVM: x86: Load Guest fpu state when accessing MSRs managed by XSAVES Yang Weijiang
2019-05-22 7:01 ` [PATCH v5 8/8] KVM: x86: Add user-space access interface for CET MSRs Yang Weijiang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190522070101.7636-4-weijiang.yang@intel.com \
--to=weijiang.yang@intel.com \
--cc=jmattson@google.com \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mst@redhat.com \
--cc=pbonzini@redhat.com \
--cc=rkrcmar@redhat.com \
--cc=sean.j.christopherson@intel.com \
--cc=yu-cheng.yu@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.