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From: Vidya Sagar <vidyas@nvidia.com>
To: lorenzo.pieralisi@arm.com, bhelgaas@google.com,
	robh+dt@kernel.org, mark.rutland@arm.com,
	thierry.reding@gmail.com, jonathanh@nvidia.com, kishon@ti.com,
	catalin.marinas@arm.com, will.deacon@arm.com,
	jingoohan1@gmail.com, gustavo.pimentel@synopsys.com
Cc: mperttunen@nvidia.com, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, kthota@nvidia.com,
	mmaddireddy@nvidia.com, vidyas@nvidia.com, sagar.tv@gmail.com
Subject: [PATCH V8 08/15] dt-bindings: Add PCIe supports-clkreq property
Date: Sun, 26 May 2019 10:07:44 +0530	[thread overview]
Message-ID: <20190526043751.12729-9-vidyas@nvidia.com> (raw)
In-Reply-To: <20190526043751.12729-1-vidyas@nvidia.com>

Some host controllers need to know the existence of clkreq signal routing to
downstream devices to be able to advertise low power features like ASPM L1
substates. Without clkreq signal routing being present, enabling ASPM L1 sub
states might lead to downstream devices falling off the bus. Hence a new device
tree property 'supports-clkreq' is added to make such host controllers
aware of clkreq signal routing to downstream devices.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Thierry Reding <treding@nvidia.com>
---
Changes since [v7]:
* None

Changes since [v6]:
* None

Changes since [v5]:
* s/Documentation\/devicetree/dt-bindings/ in the subject

Changes since [v4]:
* None

Changes since [v3]:
* Rebased on top of linux-next top of the tree

Changes since [v2]:
* None

Changes since [v1]:
* This is a new patch in v2 series

 Documentation/devicetree/bindings/pci/pci.txt | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/pci/pci.txt b/Documentation/devicetree/bindings/pci/pci.txt
index 92c01db610df..d132f9efeb3e 100644
--- a/Documentation/devicetree/bindings/pci/pci.txt
+++ b/Documentation/devicetree/bindings/pci/pci.txt
@@ -24,6 +24,11 @@ driver implementation may support the following properties:
    unsupported link speed, for instance, trying to do training for
    unsupported link speed, etc.  Must be '4' for gen4, '3' for gen3, '2'
    for gen2, and '1' for gen1. Any other values are invalid.
+- supports-clkreq:
+   If present this property specifies that CLKREQ signal routing exists from
+   root port to downstream device and host bridge drivers can do programming
+   which depends on CLKREQ signal existence. For example, programming root port
+   not to advertise ASPM L1 Sub-States support if there is no CLKREQ signal.
 
 PCI-PCI Bridge properties
 -------------------------
-- 
2.17.1

WARNING: multiple messages have this Message-ID (diff)
From: Vidya Sagar <vidyas@nvidia.com>
To: <lorenzo.pieralisi@arm.com>, <bhelgaas@google.com>,
	<robh+dt@kernel.org>, <mark.rutland@arm.com>,
	<thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
	<kishon@ti.com>, <catalin.marinas@arm.com>, <will.deacon@arm.com>,
	<jingoohan1@gmail.com>, <gustavo.pimentel@synopsys.com>
Cc: <mperttunen@nvidia.com>, <linux-pci@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>, <kthota@nvidia.com>,
	<mmaddireddy@nvidia.com>, <vidyas@nvidia.com>,
	<sagar.tv@gmail.com>
Subject: [PATCH V8 08/15] dt-bindings: Add PCIe supports-clkreq property
Date: Sun, 26 May 2019 10:07:44 +0530	[thread overview]
Message-ID: <20190526043751.12729-9-vidyas@nvidia.com> (raw)
In-Reply-To: <20190526043751.12729-1-vidyas@nvidia.com>

Some host controllers need to know the existence of clkreq signal routing to
downstream devices to be able to advertise low power features like ASPM L1
substates. Without clkreq signal routing being present, enabling ASPM L1 sub
states might lead to downstream devices falling off the bus. Hence a new device
tree property 'supports-clkreq' is added to make such host controllers
aware of clkreq signal routing to downstream devices.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Thierry Reding <treding@nvidia.com>
---
Changes since [v7]:
* None

Changes since [v6]:
* None

Changes since [v5]:
* s/Documentation\/devicetree/dt-bindings/ in the subject

Changes since [v4]:
* None

Changes since [v3]:
* Rebased on top of linux-next top of the tree

Changes since [v2]:
* None

Changes since [v1]:
* This is a new patch in v2 series

 Documentation/devicetree/bindings/pci/pci.txt | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/pci/pci.txt b/Documentation/devicetree/bindings/pci/pci.txt
index 92c01db610df..d132f9efeb3e 100644
--- a/Documentation/devicetree/bindings/pci/pci.txt
+++ b/Documentation/devicetree/bindings/pci/pci.txt
@@ -24,6 +24,11 @@ driver implementation may support the following properties:
    unsupported link speed, for instance, trying to do training for
    unsupported link speed, etc.  Must be '4' for gen4, '3' for gen3, '2'
    for gen2, and '1' for gen1. Any other values are invalid.
+- supports-clkreq:
+   If present this property specifies that CLKREQ signal routing exists from
+   root port to downstream device and host bridge drivers can do programming
+   which depends on CLKREQ signal existence. For example, programming root port
+   not to advertise ASPM L1 Sub-States support if there is no CLKREQ signal.
 
 PCI-PCI Bridge properties
 -------------------------
-- 
2.17.1


WARNING: multiple messages have this Message-ID (diff)
From: Vidya Sagar <vidyas@nvidia.com>
To: <lorenzo.pieralisi@arm.com>, <bhelgaas@google.com>,
	<robh+dt@kernel.org>,  <mark.rutland@arm.com>,
	<thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
	<kishon@ti.com>, <catalin.marinas@arm.com>, <will.deacon@arm.com>,
	<jingoohan1@gmail.com>, <gustavo.pimentel@synopsys.com>
Cc: devicetree@vger.kernel.org, mmaddireddy@nvidia.com,
	kthota@nvidia.com, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org, mperttunen@nvidia.com,
	linux-tegra@vger.kernel.org, vidyas@nvidia.com,
	linux-arm-kernel@lists.infradead.org, sagar.tv@gmail.com
Subject: [PATCH V8 08/15] dt-bindings: Add PCIe supports-clkreq property
Date: Sun, 26 May 2019 10:07:44 +0530	[thread overview]
Message-ID: <20190526043751.12729-9-vidyas@nvidia.com> (raw)
In-Reply-To: <20190526043751.12729-1-vidyas@nvidia.com>

Some host controllers need to know the existence of clkreq signal routing to
downstream devices to be able to advertise low power features like ASPM L1
substates. Without clkreq signal routing being present, enabling ASPM L1 sub
states might lead to downstream devices falling off the bus. Hence a new device
tree property 'supports-clkreq' is added to make such host controllers
aware of clkreq signal routing to downstream devices.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Thierry Reding <treding@nvidia.com>
---
Changes since [v7]:
* None

Changes since [v6]:
* None

Changes since [v5]:
* s/Documentation\/devicetree/dt-bindings/ in the subject

Changes since [v4]:
* None

Changes since [v3]:
* Rebased on top of linux-next top of the tree

Changes since [v2]:
* None

Changes since [v1]:
* This is a new patch in v2 series

 Documentation/devicetree/bindings/pci/pci.txt | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/pci/pci.txt b/Documentation/devicetree/bindings/pci/pci.txt
index 92c01db610df..d132f9efeb3e 100644
--- a/Documentation/devicetree/bindings/pci/pci.txt
+++ b/Documentation/devicetree/bindings/pci/pci.txt
@@ -24,6 +24,11 @@ driver implementation may support the following properties:
    unsupported link speed, for instance, trying to do training for
    unsupported link speed, etc.  Must be '4' for gen4, '3' for gen3, '2'
    for gen2, and '1' for gen1. Any other values are invalid.
+- supports-clkreq:
+   If present this property specifies that CLKREQ signal routing exists from
+   root port to downstream device and host bridge drivers can do programming
+   which depends on CLKREQ signal existence. For example, programming root port
+   not to advertise ASPM L1 Sub-States support if there is no CLKREQ signal.
 
 PCI-PCI Bridge properties
 -------------------------
-- 
2.17.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2019-05-26  4:37 UTC|newest]

Thread overview: 68+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-26  4:37 [PATCH V8 00/15] Add Tegra194 PCIe support Vidya Sagar
2019-05-26  4:37 ` Vidya Sagar
2019-05-26  4:37 ` Vidya Sagar
2019-05-26  4:37 ` [PATCH V8 01/15] PCI: Add #defines for some of PCIe spec r4.0 features Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar
2019-05-26  4:37 ` [PATCH V8 02/15] PCI: Disable MSI for Tegra194 root port Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar
2019-05-26  4:37 ` [PATCH V8 03/15] PCI: dwc: Perform dbi regs write lock towards the end Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar
2019-05-26  4:37 ` [PATCH V8 04/15] PCI: dwc: Move config space capability search API Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar
2019-05-26  4:37 ` [PATCH V8 05/15] PCI: dwc: Add ext " Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar
2019-06-06 15:32   ` Thierry Reding
2019-06-06 15:32     ` Thierry Reding
2019-05-26  4:37 ` [PATCH V8 06/15] dt-bindings: PCI: designware: Add binding for CDM register check Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar
2019-05-26  4:37 ` [PATCH V8 07/15] PCI: dwc: Add support to enable " Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar
2019-05-26  4:37 ` Vidya Sagar [this message]
2019-05-26  4:37   ` [PATCH V8 08/15] dt-bindings: Add PCIe supports-clkreq property Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar
2019-05-26  4:37 ` [PATCH V8 09/15] dt-bindings: PCI: tegra: Add device tree support for Tegra194 Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar
2019-06-06 15:34   ` Thierry Reding
2019-06-06 15:34     ` Thierry Reding
2019-05-26  4:37 ` [PATCH V8 10/15] dt-bindings: PHY: P2U: Add Tegra194 P2U block Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar
2019-05-26  4:37 ` [PATCH V8 11/15] arm64: tegra: Add P2U and PCIe controller nodes to Tegra194 DT Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar
2019-05-26  4:37 ` [PATCH V8 12/15] arm64: tegra: Enable PCIe slots in P2972-0000 board Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar
2019-05-26  4:37 ` [PATCH V8 13/15] phy: tegra: Add PCIe PIPE2UPHY support Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar
2019-06-06 16:30   ` Dmitry Osipenko
2019-06-06 16:30     ` Dmitry Osipenko
2019-06-07 13:45     ` Vidya Sagar
2019-06-07 13:45       ` Vidya Sagar
2019-06-07 13:45       ` Vidya Sagar
2019-05-26  4:37 ` [PATCH V8 14/15] PCI: tegra: Add Tegra194 PCIe support Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar
2019-06-06 15:36   ` Thierry Reding
2019-06-06 15:36     ` Thierry Reding
2019-06-06 16:35   ` Dmitry Osipenko
2019-06-06 16:35     ` Dmitry Osipenko
2019-06-06 18:52     ` Dmitry Osipenko
2019-06-06 18:52       ` Dmitry Osipenko
2019-06-07 14:10       ` Vidya Sagar
2019-06-07 14:10         ` Vidya Sagar
2019-06-07 14:10         ` Vidya Sagar
2019-06-07 14:26         ` Dmitry Osipenko
2019-06-07 14:26           ` Dmitry Osipenko
2019-05-26  4:37 ` [PATCH V8 15/15] arm64: Add Tegra194 PCIe driver to defconfig Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar
2019-05-26  4:37   ` Vidya Sagar

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