From: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
To: robdclark@gmail.com, sean@poorly.run, airlied@linux.ie,
daniel@ffwll.ch, jcrouse@codeaurora.org
Cc: marc.w.gonzalez@free.fr, bjorn.andersson@linaro.org,
linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org,
Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Subject: [PATCH v2 1/2] a5xx: Define HLSQ_DBG_ECO_CNTL
Date: Wed, 29 May 2019 08:20:21 -0700 [thread overview]
Message-ID: <20190529152022.42799-2-jeffrey.l.hugo@gmail.com> (raw)
In-Reply-To: <20190529152022.42799-1-jeffrey.l.hugo@gmail.com>
---
rnndb/adreno/a5xx.xml | 1 +
1 file changed, 1 insertion(+)
diff --git a/rnndb/adreno/a5xx.xml b/rnndb/adreno/a5xx.xml
index ae654eeb..16203512 100644
--- a/rnndb/adreno/a5xx.xml
+++ b/rnndb/adreno/a5xx.xml
@@ -1523,6 +1523,7 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
<reg32 offset="0x0e00" name="HLSQ_TIMEOUT_THRESHOLD_0"/>
<reg32 offset="0x0e01" name="HLSQ_TIMEOUT_THRESHOLD_1"/>
+ <reg32 offset="0x0e04" name="HLSQ_DBG_ECO_CNTL"/>
<reg32 offset="0x0e05" name="HLSQ_ADDR_MODE_CNTL"/>
<reg32 offset="0x0e06" name="HLSQ_MODE_CNTL"/> <!-- always 00000001? -->
<reg32 offset="0x0e10" name="HLSQ_PERFCTR_HLSQ_SEL_0" type="a5xx_hlsq_perfcounter_select"/>
--
2.17.1
next prev parent reply other threads:[~2019-05-29 15:20 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-29 15:20 [PATCH v2 0/2] Adreno A540 support Jeffrey Hugo
2019-05-29 15:20 ` Jeffrey Hugo [this message]
2019-05-29 20:47 ` [PATCH v2 1/2] a5xx: Define HLSQ_DBG_ECO_CNTL Rob Clark
2019-05-29 15:20 ` [PATCH v2 2/2] drm/msm/adreno: Add A540 support Jeffrey Hugo
2019-05-29 15:20 ` Jeffrey Hugo
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