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From: Lukasz Luba <l.luba@partner.samsung.com>
To: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org,
	linux-clk@vger.kernel.org
Cc: mturquette@baylibre.com, sboyd@kernel.org,
	b.zolnierkie@samsung.com, krzk@kernel.org, kgene@kernel.org,
	cw00.choi@samsung.com, kyungmin.park@samsung.com,
	m.szyprowski@samsung.com, s.nawrocki@samsung.com,
	myungjoo.ham@samsung.com, keescook@chromium.org,
	tony@atomide.com, jroedel@suse.de, treding@nvidia.com,
	digetx@gmail.com, gregkh@linuxfoundation.org,
	willy.mh.wolff.ml@gmail.com,
	Lukasz Luba <l.luba@partner.samsung.com>
Subject: [PATCH v9 11/13] ARM: dts: exynos: add syscon to clock compatible
Date: Fri,  7 Jun 2019 16:35:05 +0200	[thread overview]
Message-ID: <20190607143507.30286-12-l.luba@partner.samsung.com> (raw)
In-Reply-To: <20190607143507.30286-1-l.luba@partner.samsung.com>

In order to get the clock by phandle and use it with regmap it needs to be
compatible with syscon. The DMC driver uses two registers from clock
register set and needs the regmap of them.

Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
---
 arch/arm/boot/dts/exynos5420.dtsi | 2 +-
 arch/arm/boot/dts/exynos5800.dtsi | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 5fb2326875dc..d153617ff1a3 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -173,7 +173,7 @@
 		};
 
 		clock: clock-controller@10010000 {
-			compatible = "samsung,exynos5420-clock";
+			compatible = "samsung,exynos5420-clock", "syscon";
 			reg = <0x10010000 0x30000>;
 			#clock-cells = <1>;
 		};
diff --git a/arch/arm/boot/dts/exynos5800.dtsi b/arch/arm/boot/dts/exynos5800.dtsi
index 57d3b319fd65..0a2b3287ed92 100644
--- a/arch/arm/boot/dts/exynos5800.dtsi
+++ b/arch/arm/boot/dts/exynos5800.dtsi
@@ -17,7 +17,7 @@
 };
 
 &clock {
-	compatible = "samsung,exynos5800-clock";
+	compatible = "samsung,exynos5800-clock", "syscon";
 };
 
 &cluster_a15_opp_table {
-- 
2.17.1


  parent reply	other threads:[~2019-06-07 14:35 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20190607143523eucas1p1015a614a64ed22f4c65ace8b795dd6d0@eucas1p1.samsung.com>
2019-06-07 14:34 ` [PATCH v9 00/13] Exynos5 Dynamic Memory Controller driver Lukasz Luba
     [not found]   ` <CGME20190607143524eucas1p22e6310f1a5f6e4bab771ebbbcc40f88c@eucas1p2.samsung.com>
2019-06-07 14:34     ` [PATCH v9 01/13] clk: samsung: add needed IDs for DMC clocks in Exynos5420 Lukasz Luba
     [not found]   ` <CGME20190607143525eucas1p15a57ab0f8b9e6ce2e77702f04ebf0c22@eucas1p1.samsung.com>
2019-06-07 14:34     ` [PATCH v9 02/13] clk: samsung: add new clocks for DMC for Exynos5422 SoC Lukasz Luba
     [not found]   ` <CGME20190607143526eucas1p1b11e7a7bf57b80de893b5b5664d3fa09@eucas1p1.samsung.com>
2019-06-07 14:34     ` [PATCH v9 03/13] clk: samsung: add BPLL rate table for Exynos 5422 SoC Lukasz Luba
     [not found]   ` <CGME20190607143527eucas1p2afb1f2b11a16d61ad802f1a0c53cf880@eucas1p2.samsung.com>
2019-06-07 14:34     ` [PATCH v9 04/13] dt-bindings: ddr: rename lpddr2 directory Lukasz Luba
     [not found]   ` <CGME20190607143528eucas1p12875b8f2043264a452da2720195f629e@eucas1p1.samsung.com>
2019-06-07 14:34     ` [PATCH v9 05/13] dt-bindings: ddr: add LPDDR3 memories Lukasz Luba
     [not found]   ` <CGME20190607143529eucas1p2ed19649f0a5404a9a2a3b45cb07d0103@eucas1p2.samsung.com>
2019-06-07 14:35     ` [PATCH v9 06/13] drivers: memory: extend of_memory by LPDDR3 support Lukasz Luba
     [not found]   ` <CGME20190607143530eucas1p15c794d0f1401fc3a48f1408c3435084a@eucas1p1.samsung.com>
2019-06-07 14:35     ` [PATCH v9 07/13] dt-bindings: memory-controllers: add Exynos5422 DMC device description Lukasz Luba
2019-06-11 22:43       ` Rob Herring
2019-06-11 22:43         ` Rob Herring
2019-06-14  8:52         ` Lukasz Luba
     [not found]   ` <CGME20190607143531eucas1p11f6b3a63068d529dae8be16abaa60ed0@eucas1p1.samsung.com>
2019-06-07 14:35     ` [PATCH v9 08/13] drivers: memory: add DMC driver for Exynos5422 Lukasz Luba
2019-06-11  6:18       ` Krzysztof Kozlowski
2019-06-14  8:50         ` Lukasz Luba
     [not found]   ` <CGME20190607143532eucas1p275590080c3b1ce9e2ce90f5b5da9be60@eucas1p2.samsung.com>
2019-06-07 14:35     ` [PATCH v9 09/13] drivers: devfreq: events: add Exynos PPMU new events Lukasz Luba
     [not found]   ` <CGME20190607143533eucas1p15b29a74650422ff1eb1fec4307333e8d@eucas1p1.samsung.com>
2019-06-07 14:35     ` [PATCH v9 10/13] ARM: dts: exynos: add chipid label and syscon compatible Lukasz Luba
     [not found]   ` <CGME20190607143534eucas1p24e5bf121447c6e9a7ef546cf15f3d6fa@eucas1p2.samsung.com>
2019-06-07 14:35     ` Lukasz Luba [this message]
     [not found]   ` <CGME20190607143535eucas1p2e1c3843aca8dd39a615f4ce26e845ed8@eucas1p2.samsung.com>
2019-06-07 14:35     ` [PATCH v9 12/13] ARM: dts: exynos: add DMC device for exynos5422 Lukasz Luba
     [not found]   ` <CGME20190607143536eucas1p2192a9061b835502ada88262ef427ce8a@eucas1p2.samsung.com>
2019-06-07 14:35     ` [PATCH v9 13/13] ARM: exynos_defconfig: enable DMC driver Lukasz Luba

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