From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH] drm/i915/ehl: Add missing VECS engine
Date: Fri, 14 Jun 2019 14:37:49 -0700 [thread overview]
Message-ID: <20190614213749.15870-1-jose.souza@intel.com> (raw)
EHL can have up to one VECS(video enhancement) engine, so add it to
the device_info.
BSpec: 29152
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Bob Paauwe <bob.j.paauwe@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Clint Taylor <Clinton.A.Taylor@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/i915_pci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 482f1d0f1770..2c5f64ccadb5 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -760,7 +760,7 @@ static const struct intel_device_info intel_elkhartlake_info = {
GEN11_FEATURES,
PLATFORM(INTEL_ELKHARTLAKE),
.require_force_probe = 1,
- .engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(VCS0),
+ .engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(VCS0) | BIT(VECS0),
.ppgtt_size = 36,
};
--
2.22.0
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next reply other threads:[~2019-06-14 21:37 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-14 21:37 José Roberto de Souza [this message]
2019-06-14 22:17 ` [PATCH] drm/i915/ehl: Add missing VECS engine Matt Roper
2019-06-20 20:11 ` Souza, Jose
2019-06-25 15:26 ` Matt Roper
2019-06-25 15:30 ` Chris Wilson
2019-06-25 21:48 ` Daniele Ceraolo Spurio
2019-06-26 5:21 ` Tvrtko Ursulin
2019-06-26 20:05 ` Bloomfield, Jon
2019-06-15 7:16 ` ✓ Fi.CI.BAT: success for " Patchwork
2019-06-17 10:19 ` ✓ Fi.CI.IGT: " Patchwork
2019-06-25 18:51 ` Souza, Jose
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