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From: Julien Grall <julien.grall@arm.com>
To: linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu
Cc: james.morse@arm.com, marc.zyngier@arm.com,
	julien.thierry@arm.com, suzuki.poulose@arm.com,
	catalin.marinas@arm.com, will.deacon@arm.com,
	Julien Grall <julien.grall@arm.com>
Subject: [PATCH v3 10/15] arm64/mm: Introduce a callback to flush the local context
Date: Wed, 24 Jul 2019 17:25:29 +0100	[thread overview]
Message-ID: <20190724162534.7390-11-julien.grall@arm.com> (raw)
In-Reply-To: <20190724162534.7390-1-julien.grall@arm.com>

Flushing the local context will vary depending on the actual user of the ASID
allocator. Introduce a new callback to flush the local context and move
the call to flush local TLB in it.

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 arch/arm64/mm/context.c | 16 +++++++++++++---
 1 file changed, 13 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c
index 5e8b381ab67f..ac10893b403c 100644
--- a/arch/arm64/mm/context.c
+++ b/arch/arm64/mm/context.c
@@ -28,6 +28,8 @@ static struct asid_info
 	cpumask_t		flush_pending;
 	/* Number of ASID allocated by context (shift value) */
 	unsigned int		ctxt_shift;
+	/* Callback to locally flush the context. */
+	void			(*flush_cpu_ctxt_cb)(void);
 } asid_info;
 
 #define active_asid(info, cpu)	*per_cpu_ptr((info)->active, cpu)
@@ -255,7 +257,7 @@ static void asid_new_context(struct asid_info *info, atomic64_t *pasid,
 	}
 
 	if (cpumask_test_and_clear_cpu(cpu, &info->flush_pending))
-		local_flush_tlb_all();
+		info->flush_cpu_ctxt_cb();
 
 	atomic64_set(&active_asid(info, cpu), asid);
 	raw_spin_unlock_irqrestore(&info->lock, flags);
@@ -287,6 +289,11 @@ asmlinkage void post_ttbr_update_workaround(void)
 			CONFIG_CAVIUM_ERRATUM_27456));
 }
 
+static void asid_flush_cpu_ctxt(void)
+{
+	local_flush_tlb_all();
+}
+
 /*
  * Initialize the ASID allocator
  *
@@ -297,10 +304,12 @@ asmlinkage void post_ttbr_update_workaround(void)
  * 2.
  */
 static int asid_allocator_init(struct asid_info *info,
-			       u32 bits, unsigned int asid_per_ctxt)
+			       u32 bits, unsigned int asid_per_ctxt,
+			       void (*flush_cpu_ctxt_cb)(void))
 {
 	info->bits = bits;
 	info->ctxt_shift = ilog2(asid_per_ctxt);
+	info->flush_cpu_ctxt_cb = flush_cpu_ctxt_cb;
 	/*
 	 * Expect allocation after rollover to fail if we don't have at least
 	 * one more ASID than CPUs. ASID #0 is always reserved.
@@ -321,7 +330,8 @@ static int asids_init(void)
 {
 	u32 bits = get_cpu_asid_bits();
 
-	if (asid_allocator_init(&asid_info, bits, ASID_PER_CONTEXT))
+	if (asid_allocator_init(&asid_info, bits, ASID_PER_CONTEXT,
+				 asid_flush_cpu_ctxt))
 		panic("Unable to initialize ASID allocator for %lu ASIDs\n",
 		      1UL << bits);
 
-- 
2.11.0


WARNING: multiple messages have this Message-ID (diff)
From: Julien Grall <julien.grall@arm.com>
To: linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu
Cc: marc.zyngier@arm.com, catalin.marinas@arm.com,
	will.deacon@arm.com, Julien Grall <julien.grall@arm.com>
Subject: [PATCH v3 10/15] arm64/mm: Introduce a callback to flush the local context
Date: Wed, 24 Jul 2019 17:25:29 +0100	[thread overview]
Message-ID: <20190724162534.7390-11-julien.grall@arm.com> (raw)
In-Reply-To: <20190724162534.7390-1-julien.grall@arm.com>

Flushing the local context will vary depending on the actual user of the ASID
allocator. Introduce a new callback to flush the local context and move
the call to flush local TLB in it.

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 arch/arm64/mm/context.c | 16 +++++++++++++---
 1 file changed, 13 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c
index 5e8b381ab67f..ac10893b403c 100644
--- a/arch/arm64/mm/context.c
+++ b/arch/arm64/mm/context.c
@@ -28,6 +28,8 @@ static struct asid_info
 	cpumask_t		flush_pending;
 	/* Number of ASID allocated by context (shift value) */
 	unsigned int		ctxt_shift;
+	/* Callback to locally flush the context. */
+	void			(*flush_cpu_ctxt_cb)(void);
 } asid_info;
 
 #define active_asid(info, cpu)	*per_cpu_ptr((info)->active, cpu)
@@ -255,7 +257,7 @@ static void asid_new_context(struct asid_info *info, atomic64_t *pasid,
 	}
 
 	if (cpumask_test_and_clear_cpu(cpu, &info->flush_pending))
-		local_flush_tlb_all();
+		info->flush_cpu_ctxt_cb();
 
 	atomic64_set(&active_asid(info, cpu), asid);
 	raw_spin_unlock_irqrestore(&info->lock, flags);
@@ -287,6 +289,11 @@ asmlinkage void post_ttbr_update_workaround(void)
 			CONFIG_CAVIUM_ERRATUM_27456));
 }
 
+static void asid_flush_cpu_ctxt(void)
+{
+	local_flush_tlb_all();
+}
+
 /*
  * Initialize the ASID allocator
  *
@@ -297,10 +304,12 @@ asmlinkage void post_ttbr_update_workaround(void)
  * 2.
  */
 static int asid_allocator_init(struct asid_info *info,
-			       u32 bits, unsigned int asid_per_ctxt)
+			       u32 bits, unsigned int asid_per_ctxt,
+			       void (*flush_cpu_ctxt_cb)(void))
 {
 	info->bits = bits;
 	info->ctxt_shift = ilog2(asid_per_ctxt);
+	info->flush_cpu_ctxt_cb = flush_cpu_ctxt_cb;
 	/*
 	 * Expect allocation after rollover to fail if we don't have at least
 	 * one more ASID than CPUs. ASID #0 is always reserved.
@@ -321,7 +330,8 @@ static int asids_init(void)
 {
 	u32 bits = get_cpu_asid_bits();
 
-	if (asid_allocator_init(&asid_info, bits, ASID_PER_CONTEXT))
+	if (asid_allocator_init(&asid_info, bits, ASID_PER_CONTEXT,
+				 asid_flush_cpu_ctxt))
 		panic("Unable to initialize ASID allocator for %lu ASIDs\n",
 		      1UL << bits);
 
-- 
2.11.0

_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

WARNING: multiple messages have this Message-ID (diff)
From: Julien Grall <julien.grall@arm.com>
To: linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu
Cc: suzuki.poulose@arm.com, marc.zyngier@arm.com,
	catalin.marinas@arm.com, julien.thierry@arm.com,
	will.deacon@arm.com, Julien Grall <julien.grall@arm.com>,
	james.morse@arm.com
Subject: [PATCH v3 10/15] arm64/mm: Introduce a callback to flush the local context
Date: Wed, 24 Jul 2019 17:25:29 +0100	[thread overview]
Message-ID: <20190724162534.7390-11-julien.grall@arm.com> (raw)
In-Reply-To: <20190724162534.7390-1-julien.grall@arm.com>

Flushing the local context will vary depending on the actual user of the ASID
allocator. Introduce a new callback to flush the local context and move
the call to flush local TLB in it.

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 arch/arm64/mm/context.c | 16 +++++++++++++---
 1 file changed, 13 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c
index 5e8b381ab67f..ac10893b403c 100644
--- a/arch/arm64/mm/context.c
+++ b/arch/arm64/mm/context.c
@@ -28,6 +28,8 @@ static struct asid_info
 	cpumask_t		flush_pending;
 	/* Number of ASID allocated by context (shift value) */
 	unsigned int		ctxt_shift;
+	/* Callback to locally flush the context. */
+	void			(*flush_cpu_ctxt_cb)(void);
 } asid_info;
 
 #define active_asid(info, cpu)	*per_cpu_ptr((info)->active, cpu)
@@ -255,7 +257,7 @@ static void asid_new_context(struct asid_info *info, atomic64_t *pasid,
 	}
 
 	if (cpumask_test_and_clear_cpu(cpu, &info->flush_pending))
-		local_flush_tlb_all();
+		info->flush_cpu_ctxt_cb();
 
 	atomic64_set(&active_asid(info, cpu), asid);
 	raw_spin_unlock_irqrestore(&info->lock, flags);
@@ -287,6 +289,11 @@ asmlinkage void post_ttbr_update_workaround(void)
 			CONFIG_CAVIUM_ERRATUM_27456));
 }
 
+static void asid_flush_cpu_ctxt(void)
+{
+	local_flush_tlb_all();
+}
+
 /*
  * Initialize the ASID allocator
  *
@@ -297,10 +304,12 @@ asmlinkage void post_ttbr_update_workaround(void)
  * 2.
  */
 static int asid_allocator_init(struct asid_info *info,
-			       u32 bits, unsigned int asid_per_ctxt)
+			       u32 bits, unsigned int asid_per_ctxt,
+			       void (*flush_cpu_ctxt_cb)(void))
 {
 	info->bits = bits;
 	info->ctxt_shift = ilog2(asid_per_ctxt);
+	info->flush_cpu_ctxt_cb = flush_cpu_ctxt_cb;
 	/*
 	 * Expect allocation after rollover to fail if we don't have at least
 	 * one more ASID than CPUs. ASID #0 is always reserved.
@@ -321,7 +330,8 @@ static int asids_init(void)
 {
 	u32 bits = get_cpu_asid_bits();
 
-	if (asid_allocator_init(&asid_info, bits, ASID_PER_CONTEXT))
+	if (asid_allocator_init(&asid_info, bits, ASID_PER_CONTEXT,
+				 asid_flush_cpu_ctxt))
 		panic("Unable to initialize ASID allocator for %lu ASIDs\n",
 		      1UL << bits);
 
-- 
2.11.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2019-07-24 16:26 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-24 16:25 [PATCH v3 00/15] kvm/arm: Align the VMID allocation with the arm64 ASID one Julien Grall
2019-07-24 16:25 ` Julien Grall
2019-07-24 16:25 ` Julien Grall
2019-07-24 16:25 ` [PATCH v3 01/15] arm64/mm: Introduce asid_info structure and move asid_generation/asid_map to it Julien Grall
2019-07-24 16:25   ` Julien Grall
2019-07-24 16:25   ` Julien Grall
2019-07-24 16:25 ` [PATCH v3 02/15] arm64/mm: Move active_asids and reserved_asids to asid_info Julien Grall
2019-07-24 16:25   ` Julien Grall
2019-07-24 16:25   ` Julien Grall
2019-07-24 16:25 ` [PATCH v3 03/15] arm64/mm: Move bits " Julien Grall
2019-07-24 16:25   ` Julien Grall
2019-07-24 16:25   ` Julien Grall
2019-07-24 16:25 ` [PATCH v3 04/15] arm64/mm: Move the variable lock and tlb_flush_pending " Julien Grall
2019-07-24 16:25   ` Julien Grall
2019-07-24 16:25   ` Julien Grall
2019-07-24 16:25 ` [PATCH v3 05/15] arm64/mm: Remove dependency on MM in new_context Julien Grall
2019-07-24 16:25   ` Julien Grall
2019-07-24 16:25   ` Julien Grall
2019-07-24 16:25 ` [PATCH v3 06/15] arm64/mm: Store the number of asid allocated per context Julien Grall
2019-07-24 16:25   ` Julien Grall
2019-07-24 16:25   ` Julien Grall
2019-07-24 16:25 ` [PATCH v3 07/15] arm64/mm: Introduce NUM_ASIDS Julien Grall
2019-07-24 16:25   ` Julien Grall
2019-07-24 16:25   ` Julien Grall
2019-07-24 16:25 ` [PATCH v3 08/15] arm64/mm: Split asid_inits in 2 parts Julien Grall
2019-07-24 16:25   ` Julien Grall
2019-07-24 16:25   ` Julien Grall
2019-07-24 16:25 ` [PATCH v3 09/15] arm64/mm: Split the function check_and_switch_context in 3 parts Julien Grall
2019-07-24 16:25   ` Julien Grall
2019-07-24 16:25   ` Julien Grall
2019-07-25 16:28   ` Catalin Marinas
2019-07-25 16:28     ` Catalin Marinas
2019-07-25 16:28     ` Catalin Marinas
2019-07-24 16:25 ` Julien Grall [this message]
2019-07-24 16:25   ` [PATCH v3 10/15] arm64/mm: Introduce a callback to flush the local context Julien Grall
2019-07-24 16:25   ` Julien Grall
2019-07-24 16:25 ` [PATCH v3 11/15] arm64: Move the ASID allocator code in a separate file Julien Grall
2019-07-24 16:25   ` Julien Grall
2019-07-24 16:25   ` Julien Grall
2019-07-24 16:25 ` [PATCH v3 12/15] arm64/lib: Add an helper to free memory allocated by the ASID allocator Julien Grall
2019-07-24 16:25   ` Julien Grall
2019-07-24 16:25   ` Julien Grall
2019-07-24 16:25 ` [PATCH v3 13/15] arm/kvm: Introduce a new VMID allocator Julien Grall
2019-07-24 16:25   ` Julien Grall
2019-07-24 16:25   ` Julien Grall
2019-07-24 16:25 ` [PATCH v3 14/15] arch/arm64: Introduce a capability to tell whether 16-bit VMID is available Julien Grall
2019-07-24 16:25   ` Julien Grall
2019-07-24 16:25   ` Julien Grall
2019-07-24 16:25 ` [PATCH v3 15/15] kvm/arm: Align the VMID allocation with the arm64 ASID one Julien Grall
2019-07-24 16:25   ` Julien Grall
2019-07-24 16:25   ` Julien Grall

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