From: Raphael Gault <raphael.gault@arm.com> To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: mingo@redhat.com, peterz@infradead.org, catalin.marinas@arm.com, will.deacon@arm.com, acme@kernel.org, mark.rutland@arm.com, raph.gault+kdev@gmail.com, Raphael Gault <raphael.gault@arm.com> Subject: [PATCH v3 5/5] Documentation: arm64: Document PMU counters access from userspace Date: Fri, 16 Aug 2019 13:59:34 +0100 [thread overview] Message-ID: <20190816125934.18509-6-raphael.gault@arm.com> (raw) In-Reply-To: <20190816125934.18509-1-raphael.gault@arm.com> Add a documentation file to describe the access to the pmu hardware counters from userspace Signed-off-by: Raphael Gault <raphael.gault@arm.com> --- .../arm64/pmu_counter_user_access.txt | 42 +++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 Documentation/arm64/pmu_counter_user_access.txt diff --git a/Documentation/arm64/pmu_counter_user_access.txt b/Documentation/arm64/pmu_counter_user_access.txt new file mode 100644 index 000000000000..6788b1107381 --- /dev/null +++ b/Documentation/arm64/pmu_counter_user_access.txt @@ -0,0 +1,42 @@ +Access to PMU hardware counter from userspace +============================================= + +Overview +-------- +The perf user-space tool relies on the PMU to monitor events. It offers an +abstraction layer over the hardware counters since the underlying +implementation is cpu-dependent. +Arm64 allows userspace tools to have access to the registers storing the +hardware counters' values directly. + +This targets specifically self-monitoring tasks in order to reduce the overhead +by directly accessing the registers without having to go through the kernel. + +How-to +------ +The focus is set on the armv8 pmuv3 which makes sure that the access to the pmu +registers is enable and that the userspace have access to the relevent +information in order to use them. + +In order to have access to the hardware counter it is necessary to open the event +using the perf tool interface: the sys_perf_event_open syscall returns a fd which +can subsequently be used with the mmap syscall in order to retrieve a page of memory +containing information about the event. +The PMU driver uses this page to expose to the user the hardware counter's +index. Using this index enables the user to access the PMU registers using the +`mrs` instruction. + +Have a look `at tools/perf/arch/arm64/tests/user-events.c` for an example. It can be +run using the perf tool to check that the access to the registers works +correctly from userspace: + +./perf test -v + +About chained events +-------------------- +When the user requests for an event to be counted on 64 bits, two hardware +counters are used and need to be combined to retrieve the correct value: + +val = read_counter(idx); +if ((event.attr.config1 & 0x1)) + val = (val << 32) | read_counter(idx - 1); -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Raphael Gault <raphael.gault@arm.com> To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: mark.rutland@arm.com, raph.gault+kdev@gmail.com, peterz@infradead.org, catalin.marinas@arm.com, will.deacon@arm.com, acme@kernel.org, Raphael Gault <raphael.gault@arm.com>, mingo@redhat.com Subject: [PATCH v3 5/5] Documentation: arm64: Document PMU counters access from userspace Date: Fri, 16 Aug 2019 13:59:34 +0100 [thread overview] Message-ID: <20190816125934.18509-6-raphael.gault@arm.com> (raw) In-Reply-To: <20190816125934.18509-1-raphael.gault@arm.com> Add a documentation file to describe the access to the pmu hardware counters from userspace Signed-off-by: Raphael Gault <raphael.gault@arm.com> --- .../arm64/pmu_counter_user_access.txt | 42 +++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 Documentation/arm64/pmu_counter_user_access.txt diff --git a/Documentation/arm64/pmu_counter_user_access.txt b/Documentation/arm64/pmu_counter_user_access.txt new file mode 100644 index 000000000000..6788b1107381 --- /dev/null +++ b/Documentation/arm64/pmu_counter_user_access.txt @@ -0,0 +1,42 @@ +Access to PMU hardware counter from userspace +============================================= + +Overview +-------- +The perf user-space tool relies on the PMU to monitor events. It offers an +abstraction layer over the hardware counters since the underlying +implementation is cpu-dependent. +Arm64 allows userspace tools to have access to the registers storing the +hardware counters' values directly. + +This targets specifically self-monitoring tasks in order to reduce the overhead +by directly accessing the registers without having to go through the kernel. + +How-to +------ +The focus is set on the armv8 pmuv3 which makes sure that the access to the pmu +registers is enable and that the userspace have access to the relevent +information in order to use them. + +In order to have access to the hardware counter it is necessary to open the event +using the perf tool interface: the sys_perf_event_open syscall returns a fd which +can subsequently be used with the mmap syscall in order to retrieve a page of memory +containing information about the event. +The PMU driver uses this page to expose to the user the hardware counter's +index. Using this index enables the user to access the PMU registers using the +`mrs` instruction. + +Have a look `at tools/perf/arch/arm64/tests/user-events.c` for an example. It can be +run using the perf tool to check that the access to the registers works +correctly from userspace: + +./perf test -v + +About chained events +-------------------- +When the user requests for an event to be counted on 64 bits, two hardware +counters are used and need to be combined to retrieve the correct value: + +val = read_counter(idx); +if ((event.attr.config1 & 0x1)) + val = (val << 32) | read_counter(idx - 1); -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-08-16 13:00 UTC|newest] Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-08-16 12:59 [PATCH v3 0/5] arm64: Enable access to pmu registers by user-space Raphael Gault 2019-08-16 12:59 ` Raphael Gault 2019-08-16 12:59 ` [PATCH v3 1/5] perf: arm64: Add test to check userspace access to hardware counters Raphael Gault 2019-08-16 12:59 ` Raphael Gault 2019-08-16 12:59 ` [PATCH v3 2/5] arm64: cpufeature: Add feature to detect heterogeneous systems Raphael Gault 2019-08-16 12:59 ` Raphael Gault 2019-08-20 15:23 ` Mark Rutland 2019-08-20 15:23 ` Mark Rutland 2019-08-20 15:49 ` Mark Rutland 2019-08-20 15:49 ` Mark Rutland 2019-08-20 15:55 ` Raphael Gault 2019-08-20 15:55 ` Raphael Gault 2019-08-20 16:03 ` Mark Rutland 2019-08-20 16:03 ` Mark Rutland 2019-08-16 12:59 ` [PATCH v3 3/5] arm64: pmu: Add function implementation to update event index in userpage Raphael Gault 2019-08-16 12:59 ` Raphael Gault 2019-08-20 15:34 ` Mark Rutland 2019-08-20 15:34 ` Mark Rutland 2019-08-16 12:59 ` [PATCH v3 4/5] arm64: perf: Enable pmu counter direct access for perf event on armv8 Raphael Gault 2019-08-16 12:59 ` Raphael Gault 2019-08-18 12:37 ` kbuild test robot 2019-08-18 12:37 ` kbuild test robot 2019-08-19 7:59 ` Raphael Gault 2019-08-19 7:59 ` Raphael Gault 2019-08-20 6:49 ` [kbuild-all] " Philip Li 2019-08-20 6:49 ` Philip Li 2019-08-16 12:59 ` Raphael Gault [this message] 2019-08-16 12:59 ` [PATCH v3 5/5] Documentation: arm64: Document PMU counters access from userspace Raphael Gault
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