From: Tero Kristo <t-kristo@ti.com> To: ssantosh@kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, robh+dt@kernel.org, p.zabel@pengutronix.de Cc: tony@atomide.com, devicetree@vger.kernel.org Subject: [PATCHv2 01/11] dt-bindings: omap: add new binding for PRM instances Date: Wed, 28 Aug 2019 10:19:31 +0300 [thread overview] Message-ID: <20190828071941.32378-2-t-kristo@ti.com> (raw) In-Reply-To: <20190828071941.32378-1-t-kristo@ti.com> Add new binding for OMAP PRM (Power and Reset Manager) instances. Each of these will act as a power domain controller and potentially as a reset provider. Signed-off-by: Tero Kristo <t-kristo@ti.com> --- .../devicetree/bindings/arm/omap/prm-inst.txt | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/omap/prm-inst.txt diff --git a/Documentation/devicetree/bindings/arm/omap/prm-inst.txt b/Documentation/devicetree/bindings/arm/omap/prm-inst.txt new file mode 100644 index 000000000000..7c7527c37734 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/omap/prm-inst.txt @@ -0,0 +1,31 @@ +OMAP PRM instance bindings + +Power and Reset Manager is an IP block on OMAP family of devices which +handle the power domains and their current state, and provide reset +handling for the domains and/or separate IP blocks under the power domain +hierarchy. + +Required properties: +- compatible: Must be one of: + "ti,am3-prm-inst" + "ti,am4-prm-inst" + "ti,omap4-prm-inst" + "ti,omap5-prm-inst" + "ti,dra7-prm-inst" +- reg: Contains PRM instance register address range + (base address and length) + +Optional properties: +- #reset-cells: Should be 1 if the PRM instance in question supports resets. +- clocks: Associated clocks for the reset signals if any. Certain reset + signals can't be toggled properly without functional clock + being active for them. + +Example: + +prm_dsp2: prm@1b00 { + compatible = "ti,dra7-prm-inst"; + reg = <0x1b00 0x40>; + #reset-cells = <1>; + clocks = <&dsp2_clkctrl DRA7_DSP2_MMU0_DSP2_CLKCTRL 0>; +}; -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
WARNING: multiple messages have this Message-ID (diff)
From: Tero Kristo <t-kristo@ti.com> To: <ssantosh@kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-omap@vger.kernel.org>, <robh+dt@kernel.org>, <p.zabel@pengutronix.de> Cc: tony@atomide.com, devicetree@vger.kernel.org Subject: [PATCHv2 01/11] dt-bindings: omap: add new binding for PRM instances Date: Wed, 28 Aug 2019 10:19:31 +0300 [thread overview] Message-ID: <20190828071941.32378-2-t-kristo@ti.com> (raw) In-Reply-To: <20190828071941.32378-1-t-kristo@ti.com> Add new binding for OMAP PRM (Power and Reset Manager) instances. Each of these will act as a power domain controller and potentially as a reset provider. Signed-off-by: Tero Kristo <t-kristo@ti.com> --- .../devicetree/bindings/arm/omap/prm-inst.txt | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/omap/prm-inst.txt diff --git a/Documentation/devicetree/bindings/arm/omap/prm-inst.txt b/Documentation/devicetree/bindings/arm/omap/prm-inst.txt new file mode 100644 index 000000000000..7c7527c37734 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/omap/prm-inst.txt @@ -0,0 +1,31 @@ +OMAP PRM instance bindings + +Power and Reset Manager is an IP block on OMAP family of devices which +handle the power domains and their current state, and provide reset +handling for the domains and/or separate IP blocks under the power domain +hierarchy. + +Required properties: +- compatible: Must be one of: + "ti,am3-prm-inst" + "ti,am4-prm-inst" + "ti,omap4-prm-inst" + "ti,omap5-prm-inst" + "ti,dra7-prm-inst" +- reg: Contains PRM instance register address range + (base address and length) + +Optional properties: +- #reset-cells: Should be 1 if the PRM instance in question supports resets. +- clocks: Associated clocks for the reset signals if any. Certain reset + signals can't be toggled properly without functional clock + being active for them. + +Example: + +prm_dsp2: prm@1b00 { + compatible = "ti,dra7-prm-inst"; + reg = <0x1b00 0x40>; + #reset-cells = <1>; + clocks = <&dsp2_clkctrl DRA7_DSP2_MMU0_DSP2_CLKCTRL 0>; +}; -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-08-28 7:19 UTC|newest] Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-08-28 7:19 [PATCHv2 00/11] soc: ti: add OMAP PRM driver (for reset) Tero Kristo 2019-08-28 7:19 ` Tero Kristo 2019-08-28 7:19 ` Tero Kristo [this message] 2019-08-28 7:19 ` [PATCHv2 01/11] dt-bindings: omap: add new binding for PRM instances Tero Kristo 2019-08-30 9:18 ` Tero Kristo 2019-08-30 9:18 ` Tero Kristo 2019-08-28 7:19 ` [PATCHv2 02/11] soc: ti: add initial PRM driver with reset control support Tero Kristo 2019-08-28 7:19 ` Tero Kristo 2019-08-28 7:19 ` Tero Kristo 2019-08-29 13:12 ` Philipp Zabel 2019-08-29 13:12 ` Philipp Zabel 2019-08-30 7:28 ` Tero Kristo 2019-08-30 7:28 ` Tero Kristo 2019-08-30 7:28 ` Tero Kristo 2019-08-30 9:02 ` Philipp Zabel 2019-08-30 9:02 ` Philipp Zabel 2019-08-30 9:11 ` Tero Kristo 2019-08-30 9:11 ` Tero Kristo 2019-08-28 7:19 ` [PATCHv2 03/11] soc: ti: omap-prm: poll for reset complete during de-assert Tero Kristo 2019-08-28 7:19 ` Tero Kristo 2019-08-29 13:14 ` Philipp Zabel 2019-08-29 13:14 ` Philipp Zabel 2019-08-30 9:07 ` Tero Kristo 2019-08-30 9:07 ` Tero Kristo 2019-08-28 7:19 ` [PATCHv2 04/11] soc: ti: omap-prm: add support for denying idle for reset clockdomain Tero Kristo 2019-08-28 7:19 ` Tero Kristo 2019-08-28 7:19 ` [PATCHv2 05/11] soc: ti: omap-prm: sync func clock status with resets Tero Kristo 2019-08-28 7:19 ` Tero Kristo 2019-08-29 13:25 ` Philipp Zabel 2019-08-29 13:25 ` Philipp Zabel 2019-08-30 7:03 ` Tero Kristo 2019-08-30 7:03 ` Tero Kristo 2019-08-28 7:19 ` [PATCHv2 06/11] soc: ti: omap-prm: support resets with no associated clockdomain Tero Kristo 2019-08-28 7:19 ` Tero Kristo 2019-08-28 7:19 ` [PATCHv2 07/11] soc: ti: omap-prm: add omap4 PRM data Tero Kristo 2019-08-28 7:19 ` Tero Kristo 2019-08-28 7:19 ` [PATCHv2 08/11] soc: ti: omap-prm: add data for am33xx Tero Kristo 2019-08-28 7:19 ` Tero Kristo 2019-08-28 7:19 ` [PATCHv2 09/11] soc: ti: omap-prm: add dra7 PRM data Tero Kristo 2019-08-28 7:19 ` Tero Kristo 2019-08-28 7:19 ` [PATCHv2 10/11] soc: ti: omap-prm: add am4 " Tero Kristo 2019-08-28 7:19 ` Tero Kristo 2019-08-28 7:19 ` [PATCHv2 11/11] soc: ti: omap-prm: add omap5 " Tero Kristo 2019-08-28 7:19 ` Tero Kristo
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