From: Animesh Manna <animesh.manna@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Michel Thierry <michel.thierry@intel.com>,
Jani Nikula <jani.nikula@intel.com>
Subject: [PATCH v6 05/10] drm/i915/dsb: Check DSB engine status.
Date: Thu, 12 Sep 2019 00:41:28 +0530 [thread overview]
Message-ID: <20190911191133.23383-6-animesh.manna@intel.com> (raw)
In-Reply-To: <20190911191133.23383-1-animesh.manna@intel.com>
As per bspec check for DSB status before programming any
of its register. Inline function added to check the dsb status.
Cc: Michel Thierry <michel.thierry@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
drivers/gpu/drm/i915/display/intel_dsb.c | 9 +++++++++
drivers/gpu/drm/i915/i915_reg.h | 7 +++++++
2 files changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
index 9e2927f869b9..b1da2b06263a 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -17,6 +17,15 @@
#define DSB_BYTE_EN_SHIFT 20
#define DSB_REG_VALUE_MASK 0xfffff
+static inline bool is_dsb_busy(struct intel_dsb *dsb)
+{
+ struct intel_crtc *crtc = container_of(dsb, typeof(*crtc), dsb);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ enum pipe pipe = crtc->pipe;
+
+ return DSB_STATUS & I915_READ(DSB_CTRL(pipe, dsb->id));
+}
+
struct intel_dsb *
intel_dsb_get(struct intel_crtc *crtc)
{
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index bf37ecebc82f..9188a0b53538 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -11683,4 +11683,11 @@ enum skl_power_gate {
#define PORT_TX_DFLEXDPCSSS(fia) _MMIO_FIA((fia), 0x00894)
#define DP_PHY_MODE_STATUS_NOT_SAFE(tc_port) (1 << (tc_port))
+/* This register controls the Display State Buffer (DSB) engines. */
+#define _DSBSL_INSTANCE_BASE 0x70B00
+#define DSBSL_INSTANCE(pipe, id) (_DSBSL_INSTANCE_BASE + \
+ (pipe) * 0x1000 + (id) * 100)
+#define DSB_CTRL(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x8)
+#define DSB_STATUS (1 << 0)
+
#endif /* _I915_REG_H_ */
--
2.22.0
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next prev parent reply other threads:[~2019-09-11 19:19 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-11 19:11 [PATCH v6 00/10] DSB enablement Animesh Manna
2019-09-11 19:11 ` [PATCH v6 01/10] drm/i915/dsb: feature flag added for display state buffer Animesh Manna
2019-09-12 12:09 ` Sharma, Shashank
2019-09-11 19:11 ` [PATCH v6 02/10] drm/i915/dsb: DSB context creation Animesh Manna
2019-09-12 12:31 ` Sharma, Shashank
2019-09-12 12:47 ` Jani Nikula
2019-09-11 19:11 ` [PATCH v6 03/10] drm/i915/dsb: single register write function for DSB Animesh Manna
2019-09-12 12:48 ` Sharma, Shashank
2019-09-12 12:51 ` Jani Nikula
2019-09-12 13:00 ` Sharma, Shashank
2019-09-12 13:07 ` Animesh Manna
2019-09-12 13:20 ` Sharma, Shashank
2019-09-11 19:11 ` [PATCH v6 04/10] drm/i915/dsb: Indexed " Animesh Manna
2019-09-12 13:18 ` Sharma, Shashank
2019-09-11 19:11 ` Animesh Manna [this message]
2019-09-12 13:21 ` [PATCH v6 05/10] drm/i915/dsb: Check DSB engine status Sharma, Shashank
2019-09-11 19:11 ` [PATCH v6 06/10] drm/i915/dsb: functions to enable/disable DSB engine Animesh Manna
2019-09-12 13:34 ` Sharma, Shashank
2019-09-11 19:11 ` [PATCH v6 07/10] drm/i915/dsb: function to trigger workload execution of DSB Animesh Manna
2019-09-12 13:36 ` Sharma, Shashank
2019-09-12 13:39 ` Jani Nikula
2019-09-12 13:58 ` Sharma, Shashank
2019-09-16 19:23 ` Jani Nikula
2019-09-11 19:11 ` [PATCH v6 08/10] drm/i915/dsb: Enable gamma lut programming using DSB Animesh Manna
2019-09-12 13:07 ` Jani Nikula
2019-09-12 13:26 ` Animesh Manna
2019-09-17 7:30 ` Jani Nikula
2019-09-17 9:19 ` Animesh Manna
2019-09-11 19:11 ` [PATCH v6 09/10] drm/i915/dsb: Enable DSB for gen12 Animesh Manna
2019-09-12 14:00 ` Sharma, Shashank
2019-09-11 19:11 ` [PATCH v6 10/10] drm/i915/dsb: Documentation for DSB Animesh Manna
2019-09-12 7:02 ` ✗ Fi.CI.CHECKPATCH: warning for DSB enablement. (rev6) Patchwork
2019-09-12 7:04 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-09-12 7:25 ` ✓ Fi.CI.BAT: success " Patchwork
2019-09-12 11:50 ` ✗ Fi.CI.IGT: failure " Patchwork
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