From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Viresh Kumar <vireshk@kernel.org>,
dmaengine@vger.kernel.org, Vinod Koul <vkoul@kernel.org>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Subject: [PATCH v1] dmaengine: dw: platform: Mark 'hclk' clock optional
Date: Tue, 24 Sep 2019 11:51:16 +0300 [thread overview]
Message-ID: <20190924085116.83683-1-andriy.shevchenko@linux.intel.com> (raw)
On some platforms the clock can be fixed rate, always running one and
there is no need to do anything with it.
In order to support those platforms, switch to use optional clock.
Fixes: f8d9ddbc2851 ("Enable iDMA 32-bit on Intel Elkhart Lake")
Depends-on: 60b8f0ddf1a9 ("clk: Add (devm_)clk_get_optional() functions")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
drivers/dma/dw/platform.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/dw/platform.c b/drivers/dma/dw/platform.c
index 6a94f22b6637..bffc79a620ae 100644
--- a/drivers/dma/dw/platform.c
+++ b/drivers/dma/dw/platform.c
@@ -66,7 +66,7 @@ static int dw_probe(struct platform_device *pdev)
data->chip = chip;
- chip->clk = devm_clk_get(chip->dev, "hclk");
+ chip->clk = devm_clk_get_optional(chip->dev, "hclk");
if (IS_ERR(chip->clk))
return PTR_ERR(chip->clk);
err = clk_prepare_enable(chip->clk);
--
2.23.0
next reply other threads:[~2019-09-24 8:51 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-24 8:51 Andy Shevchenko [this message]
2019-09-24 11:52 ` [PATCH v1] dmaengine: dw: platform: Mark 'hclk' clock optional Viresh Kumar
2019-10-14 8:21 ` Vinod Koul
2019-10-14 9:16 ` Viresh Kumar
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