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From: Keiya Nobuta <nobuta.keiya@fujitsu.com>
To: geert+renesas@glider.be
Cc: linux-renesas-soc@vger.kernel.org, nobuta.keiya@fujitsu.com
Subject: [PATCH] pinctrl: sh-pfc: Fix PINMUX_IPSR_PHYS() to set to GPSR
Date: Tue,  8 Oct 2019 15:01:12 +0900	[thread overview]
Message-ID: <20191008060112.29819-1-nobuta.keiya@fujitsu.com> (raw)

This patch allows PINMUX_IPSR_PHYS() to set bits to GPSR.
When assigning function to pin, GPSR should be set peripheral function.
For example in using SCL3, GPSR2 bit7 (PWM1_A pin) should be set to
peripheral function.

Signed-off-by: Keiya Nobuta <nobuta.keiya@fujitsu.com>
---
 drivers/pinctrl/sh-pfc/sh_pfc.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
index 63d2089..12d15b6 100644
--- a/drivers/pinctrl/sh-pfc/sh_pfc.h
+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
@@ -423,12 +423,12 @@ extern const struct sh_pfc_soc_info shx3_pinmux_info;
 /*
  * Describe a pinmux configuration in which a pin is physically multiplexed
  * with other pins.
- *   - ipsr: IPSR field (unused, for documentation purposes only)
+ *   - ipsr: IPSR field
  *   - fn: Function name
  *   - psel: Physical multiplexing selector
  */
 #define PINMUX_IPSR_PHYS(ipsr, fn, psel) \
-	PINMUX_DATA(fn##_MARK, FN_##psel)
+	PINMUX_DATA(fn##_MARK, FN_##psel, FN_##ipsr)
 
 /*
  * Describe a pinmux configuration for a single-function pin with GPIO
-- 
2.7.4


             reply	other threads:[~2019-10-08  6:12 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-08  6:01 Keiya Nobuta [this message]
2019-10-14  9:50 ` [PATCH] pinctrl: sh-pfc: Fix PINMUX_IPSR_PHYS() to set to GPSR Geert Uytterhoeven

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