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From: Tony Lindgren <tony@atomide.com>
To: linux-omap@vger.kernel.org
Cc: Merlijn Wajer <merlijn@wizzup.org>, Pavel Machek <pavel@ucw.cz>,
	linux-arm-kernel@lists.infradead.org,
	Sebastian Reichel <sre@kernel.org>
Subject: [PATCH 7/8] ARM: OMAP2+: Allow core oswr for omap4
Date: Wed,  9 Oct 2019 17:12:23 -0700	[thread overview]
Message-ID: <20191010001224.41826-8-tony@atomide.com> (raw)
In-Reply-To: <20191010001224.41826-1-tony@atomide.com>

Commit f74297dd9354 ("ARM: OMAP2+: Make sure LOGICRETSTATE bits are not
cleared") disabled oswr (open switch retention) for per and core domains
as various GPIO related issues were noticed if the bootloader had
configured the bits for LOGICRETSTATE for per and core domains.

With the recent gpio-omap fixes, mostly related to commit e6818d29ea15
("gpio: gpio-omap: configure edge detection for level IRQs for idle
wakeup"), things now behave for enabling core oswr for omap4.

Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/mach-omap2/pm44xx.c | 14 ++------------
 1 file changed, 2 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -128,18 +128,8 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
 		return 0;
 	}
 
-	/*
-	 * Bootloader or kexec boot may have LOGICRETSTATE cleared
-	 * for some domains. This is the case when kexec booting from
-	 * Android kernels that support off mode for example.
-	 * Make sure it's set at least for core and per, otherwise
-	 * we currently will see lost GPIO interrupts for wlcore and
-	 * smsc911x at least if per hits retention during idle.
-	 */
-	if (!strncmp(pwrdm->name, "core", 4)
-		pwrdm_set_logic_retst(pwrdm, PWRDM_POWER_RET);
-
-	if (!strncmp(pwrdm->name, "l4per", 5)
+	if (!strncmp(pwrdm->name, "core", 4) ||
+	    !strncmp(pwrdm->name, "l4per", 5))
 		pwrdm_set_logic_retst(pwrdm, PWRDM_POWER_OFF);
 
 	pwrst = kmalloc(sizeof(struct power_state), GFP_ATOMIC);
-- 
2.23.0

WARNING: multiple messages have this Message-ID (diff)
From: Tony Lindgren <tony@atomide.com>
To: linux-omap@vger.kernel.org
Cc: Merlijn Wajer <merlijn@wizzup.org>, Pavel Machek <pavel@ucw.cz>,
	linux-arm-kernel@lists.infradead.org,
	Sebastian Reichel <sre@kernel.org>
Subject: [PATCH 7/8] ARM: OMAP2+: Allow core oswr for omap4
Date: Wed,  9 Oct 2019 17:12:23 -0700	[thread overview]
Message-ID: <20191010001224.41826-8-tony@atomide.com> (raw)
In-Reply-To: <20191010001224.41826-1-tony@atomide.com>

Commit f74297dd9354 ("ARM: OMAP2+: Make sure LOGICRETSTATE bits are not
cleared") disabled oswr (open switch retention) for per and core domains
as various GPIO related issues were noticed if the bootloader had
configured the bits for LOGICRETSTATE for per and core domains.

With the recent gpio-omap fixes, mostly related to commit e6818d29ea15
("gpio: gpio-omap: configure edge detection for level IRQs for idle
wakeup"), things now behave for enabling core oswr for omap4.

Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/mach-omap2/pm44xx.c | 14 ++------------
 1 file changed, 2 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -128,18 +128,8 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
 		return 0;
 	}
 
-	/*
-	 * Bootloader or kexec boot may have LOGICRETSTATE cleared
-	 * for some domains. This is the case when kexec booting from
-	 * Android kernels that support off mode for example.
-	 * Make sure it's set at least for core and per, otherwise
-	 * we currently will see lost GPIO interrupts for wlcore and
-	 * smsc911x at least if per hits retention during idle.
-	 */
-	if (!strncmp(pwrdm->name, "core", 4)
-		pwrdm_set_logic_retst(pwrdm, PWRDM_POWER_RET);
-
-	if (!strncmp(pwrdm->name, "l4per", 5)
+	if (!strncmp(pwrdm->name, "core", 4) ||
+	    !strncmp(pwrdm->name, "l4per", 5))
 		pwrdm_set_logic_retst(pwrdm, PWRDM_POWER_OFF);
 
 	pwrst = kmalloc(sizeof(struct power_state), GFP_ATOMIC);
-- 
2.23.0

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  parent reply	other threads:[~2019-10-10  0:12 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-10  0:12 [PATCH 0/8] Improve PM for omap4 devices Tony Lindgren
2019-10-10  0:12 ` Tony Lindgren
2019-10-10  0:12 ` [PATCH 1/8] ARM: OMAP2+: Remove unused wakeup_cpu Tony Lindgren
2019-10-10  0:12   ` Tony Lindgren
2019-10-13 11:38   ` Pavel Machek
2019-10-10  0:12 ` [PATCH 2/8] ARM: OMAP2+: Drop bogus wkup domain oswr setting Tony Lindgren
2019-10-10  0:12   ` Tony Lindgren
2019-10-13 15:07   ` Pavel Machek
2019-10-16 14:40     ` Tony Lindgren
2019-10-16 14:40       ` Tony Lindgren
2019-10-10  0:12 ` [PATCH 3/8] ARM: OMAP2+: Remove bogus warnings for machines without twl PMIC Tony Lindgren
2019-10-10  0:12   ` Tony Lindgren
2019-10-10  0:12 ` [PATCH 4/8] ARM: OMAP2+: Update 4430 voltage controller operating points Tony Lindgren
2019-10-10  0:12   ` Tony Lindgren
2019-10-10  0:12 ` [PATCH 5/8] ARM: OMAP2+: Configure voltage controller for cpcap Tony Lindgren
2019-10-10  0:12   ` Tony Lindgren
2019-10-13 14:46   ` Pavel Machek
2019-10-10  0:12 ` [PATCH 6/8] ARM: OMAP2+: Allow per oswr for omap4 Tony Lindgren
2019-10-10  0:12   ` Tony Lindgren
2019-10-10  0:12 ` Tony Lindgren [this message]
2019-10-10  0:12   ` [PATCH 7/8] ARM: OMAP2+: Allow core " Tony Lindgren
2019-10-13 15:08   ` Pavel Machek
2019-10-16 14:46     ` Tony Lindgren
2019-10-16 14:46       ` Tony Lindgren
2019-10-10  0:12 ` [PATCH 8/8] ARM: OMAP2+: Initialize voltage controller " Tony Lindgren
2019-10-10  0:12   ` Tony Lindgren
2019-10-13 15:08   ` Pavel Machek
2019-10-16 14:53   ` Tony Lindgren
2019-10-16 14:53     ` Tony Lindgren
2019-10-17  1:19     ` Tony Lindgren
2019-10-17  1:19       ` Tony Lindgren

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