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From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 1/2] drm/i915: Remove nonpriv flags when srm/lrm
Date: Thu, 24 Oct 2019 13:38:57 +0300	[thread overview]
Message-ID: <20191024103858.28113-1-mika.kuoppala@linux.intel.com> (raw)

On testing the whitelists, using any of the nonpriv
flags when trying to access the register offset will lead
to failure.

Define address mask to get the mmio offset in order
to guard against any current and future flag usage.

Cc: Tapani Pälli <tapani.palli@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/gt/selftest_workarounds.c | 7 +++++--
 drivers/gpu/drm/i915/i915_reg.h                | 1 +
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index ef02920cec29..54324c6577dc 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -513,6 +513,9 @@ static int check_dirty_whitelist(struct i915_gem_context *ctx,
 
 		ro_reg = ro_register(reg);
 
+		/* Clear non priv flags */
+		reg &= RING_FORCE_TO_NONPRIV_ADDRESS_MASK;
+
 		srm = MI_STORE_REGISTER_MEM;
 		lrm = MI_LOAD_REGISTER_MEM;
 		if (INTEL_GEN(ctx->i915) >= 8)
@@ -810,8 +813,8 @@ static int read_whitelisted_registers(struct i915_gem_context *ctx,
 		u64 offset = results->node.start + sizeof(u32) * i;
 		u32 reg = i915_mmio_reg_offset(engine->whitelist.list[i].reg);
 
-		/* Clear access permission field */
-		reg &= ~RING_FORCE_TO_NONPRIV_ACCESS_MASK;
+		/* Clear non priv flags */
+		reg &= RING_FORCE_TO_NONPRIV_ADDRESS_MASK;
 
 		*cs++ = srm;
 		*cs++ = reg;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 855db888516c..3ba503b5e0d9 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2490,6 +2490,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
 #define GEN8_RING_CS_GPR_UDW(base, n)	_MMIO((base) + 0x600 + (n) * 8 + 4)
 
 #define RING_FORCE_TO_NONPRIV(base, i) _MMIO(((base) + 0x4D0) + (i) * 4)
+#define   RING_FORCE_TO_NONPRIV_ADDRESS_MASK	REG_GENMASK(25, 2)
 #define   RING_FORCE_TO_NONPRIV_ACCESS_RW	(0 << 28)    /* CFL+ & Gen11+ */
 #define   RING_FORCE_TO_NONPRIV_ACCESS_RD	(1 << 28)
 #define   RING_FORCE_TO_NONPRIV_ACCESS_WR	(2 << 28)
-- 
2.17.1

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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 1/2] drm/i915: Remove nonpriv flags when srm/lrm
Date: Thu, 24 Oct 2019 13:38:57 +0300	[thread overview]
Message-ID: <20191024103858.28113-1-mika.kuoppala@linux.intel.com> (raw)
Message-ID: <20191024103857.HuOrSmORQFW7QC6D047rQcp93P4RRWxqTXhB0RlTMhE@z> (raw)

On testing the whitelists, using any of the nonpriv
flags when trying to access the register offset will lead
to failure.

Define address mask to get the mmio offset in order
to guard against any current and future flag usage.

Cc: Tapani Pälli <tapani.palli@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/gt/selftest_workarounds.c | 7 +++++--
 drivers/gpu/drm/i915/i915_reg.h                | 1 +
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index ef02920cec29..54324c6577dc 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -513,6 +513,9 @@ static int check_dirty_whitelist(struct i915_gem_context *ctx,
 
 		ro_reg = ro_register(reg);
 
+		/* Clear non priv flags */
+		reg &= RING_FORCE_TO_NONPRIV_ADDRESS_MASK;
+
 		srm = MI_STORE_REGISTER_MEM;
 		lrm = MI_LOAD_REGISTER_MEM;
 		if (INTEL_GEN(ctx->i915) >= 8)
@@ -810,8 +813,8 @@ static int read_whitelisted_registers(struct i915_gem_context *ctx,
 		u64 offset = results->node.start + sizeof(u32) * i;
 		u32 reg = i915_mmio_reg_offset(engine->whitelist.list[i].reg);
 
-		/* Clear access permission field */
-		reg &= ~RING_FORCE_TO_NONPRIV_ACCESS_MASK;
+		/* Clear non priv flags */
+		reg &= RING_FORCE_TO_NONPRIV_ADDRESS_MASK;
 
 		*cs++ = srm;
 		*cs++ = reg;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 855db888516c..3ba503b5e0d9 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2490,6 +2490,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
 #define GEN8_RING_CS_GPR_UDW(base, n)	_MMIO((base) + 0x600 + (n) * 8 + 4)
 
 #define RING_FORCE_TO_NONPRIV(base, i) _MMIO(((base) + 0x4D0) + (i) * 4)
+#define   RING_FORCE_TO_NONPRIV_ADDRESS_MASK	REG_GENMASK(25, 2)
 #define   RING_FORCE_TO_NONPRIV_ACCESS_RW	(0 << 28)    /* CFL+ & Gen11+ */
 #define   RING_FORCE_TO_NONPRIV_ACCESS_RD	(1 << 28)
 #define   RING_FORCE_TO_NONPRIV_ACCESS_WR	(2 << 28)
-- 
2.17.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

             reply	other threads:[~2019-10-24 10:39 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-24 10:38 Mika Kuoppala [this message]
2019-10-24 10:38 ` [Intel-gfx] [PATCH 1/2] drm/i915: Remove nonpriv flags when srm/lrm Mika Kuoppala
2019-10-24 10:38 ` [PATCH 2/2] drm/i915/tgl: whitelist PS_(DEPTH|INVOCATION)_COUNT Mika Kuoppala
2019-10-24 10:38   ` [Intel-gfx] " Mika Kuoppala
2019-10-24 10:52 ` [PATCH 1/2] drm/i915: Remove nonpriv flags when srm/lrm Lionel Landwerlin
2019-10-24 10:52   ` [Intel-gfx] " Lionel Landwerlin
2019-10-24 11:03 ` Mika Kuoppala
2019-10-24 11:03   ` [Intel-gfx] " Mika Kuoppala
2019-10-24 11:37   ` Chris Wilson
2019-10-24 11:37     ` [Intel-gfx] " Chris Wilson
2019-10-24 15:23     ` Lionel Landwerlin
2019-10-24 15:23       ` [Intel-gfx] " Lionel Landwerlin
2019-10-24 22:36       ` Chris Wilson
2019-10-24 22:36         ` [Intel-gfx] " Chris Wilson
2019-10-24 15:29 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Remove nonpriv flags when srm/lrm (rev2) Patchwork
2019-10-24 15:29   ` [Intel-gfx] " Patchwork
2019-10-24 15:58 ` ✓ Fi.CI.BAT: success " Patchwork
2019-10-24 15:58   ` [Intel-gfx] " Patchwork
2019-10-25 23:17 ` ✓ Fi.CI.IGT: " Patchwork
2019-10-25 23:17   ` [Intel-gfx] " Patchwork

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