From: Alvaro Gamez Machado <alvaro.gamez@hazent.com>
To: Michal Simek <michal.simek@xilinx.com>,
Mark Brown <broonie@kernel.org>,
Shubhrajyoti Datta <shubhraj@xilinx.com>,
linux-spi@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org
Cc: Alvaro Gamez Machado <alvaro.gamez@hazent.com>
Subject: [PATCH] spi: xilinx: add description of new property xlnx,num-transfer-bits
Date: Thu, 24 Oct 2019 13:07:55 +0200 [thread overview]
Message-ID: <20191024110757.25820-2-alvaro.gamez@hazent.com> (raw)
In-Reply-To: <20191024110757.25820-1-alvaro.gamez@hazent.com>
This property is used to set the number of bits per transfer (bits_per_word).
Xilinx' IP core allows either 8, 16 or 32, and is non changeable on runtime,
only when instantiating the core.
Signed-off-by: Alvaro Gamez Machado <alvaro.gamez@hazent.com>
---
Documentation/devicetree/bindings/spi/spi-xilinx.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/spi/spi-xilinx.txt b/Documentation/devicetree/bindings/spi/spi-xilinx.txt
index dc924a5f71db..5f4ed3e5c994 100644
--- a/Documentation/devicetree/bindings/spi/spi-xilinx.txt
+++ b/Documentation/devicetree/bindings/spi/spi-xilinx.txt
@@ -8,7 +8,8 @@ Required properties:
number.
Optional properties:
-- xlnx,num-ss-bits : Number of chip selects used.
+- xlnx,num-ss-bits : Number of chip selects used.
+- xlnx,num-transfer-bits : Number of bits per transfer. This will be 8 if not specified
Example:
axi_quad_spi@41e00000 {
@@ -17,5 +18,6 @@ Example:
interrupts = <0 31 1>;
reg = <0x41e00000 0x10000>;
xlnx,num-ss-bits = <0x1>;
+ xlnx,num-transfer-bits = <32>;
};
--
2.23.0
next prev parent reply other threads:[~2019-10-24 11:08 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-24 11:07 [PATCH] Allowing Xilinx's AXI Quad widths different than 8 bits on userspace Alvaro Gamez Machado
2019-10-24 11:07 ` Alvaro Gamez Machado [this message]
2019-10-24 11:57 ` [PATCH] spi: xilinx: add description of new property xlnx,num-transfer-bits Mark Brown
2019-10-24 11:57 ` Applied "spi: xilinx: add description of new property xlnx,num-transfer-bits" to the spi tree Mark Brown
2019-10-24 11:07 ` [PATCH] spi: xilinx: Add DT support for selecting transfer word width Alvaro Gamez Machado
2019-10-24 11:57 ` Applied "spi: xilinx: Add DT support for selecting transfer word width" to the spi tree Mark Brown
2019-10-24 11:07 ` [PATCH] spi: set bits_per_word based on controller's bits_per_word_mask Alvaro Gamez Machado
2019-10-24 11:13 ` Mark Brown
2019-10-24 12:54 ` Alvaro Gamez Machado
2019-10-24 13:11 ` Mark Brown
2019-10-24 13:18 ` Alvaro Gamez Machado
2019-10-24 13:41 ` Mark Brown
2019-10-24 14:07 ` Alvaro Gamez Machado
2019-10-24 17:40 ` Mark Brown
2019-10-25 6:39 ` Alvaro Gamez Machado
2019-10-25 11:56 ` Mark Brown
2019-10-28 9:43 ` Alvaro Gamez Machado
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