From: Chris Wilson <chris@chris-wilson.co.uk> To: intel-gfx@lists.freedesktop.org Subject: [PATCH 07/11] drm/i915/gt: Expose preempt reset timeout via sysfs Date: Thu, 24 Oct 2019 12:40:24 +0100 [thread overview] Message-ID: <20191024114028.6170-8-chris@chris-wilson.co.uk> (raw) In-Reply-To: <20191024114028.6170-1-chris@chris-wilson.co.uk> After initialising a preemption request, we give the current resident a small amount of time to vacate the GPU. The preemption request is for a higher priority context and should be immediate to maintain high quality of service (and avoid priority inversion). However, the preemption granularity of the GPU can be quite coarse and so we need a compromise. The preempt timeout can be adjusted per-engine using, /sys/class/drm/card?/engine/*/preempt_timeout_ms and can be disabled by setting it to 0. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/Kconfig.profile | 3 ++ drivers/gpu/drm/i915/gt/intel_engine_sysfs.c | 48 ++++++++++++++++++++ 2 files changed, 51 insertions(+) diff --git a/drivers/gpu/drm/i915/Kconfig.profile b/drivers/gpu/drm/i915/Kconfig.profile index 76145d25ce65..066ea9ba2756 100644 --- a/drivers/gpu/drm/i915/Kconfig.profile +++ b/drivers/gpu/drm/i915/Kconfig.profile @@ -33,6 +33,9 @@ config DRM_I915_PREEMPT_TIMEOUT expires, the HW will be reset to allow the more important context to execute. + This is adjustable via + /sys/class/drm/card?/engine/*/preempt_timeout_ms + May be 0 to disable the timeout. config DRM_I915_SPIN_REQUEST diff --git a/drivers/gpu/drm/i915/gt/intel_engine_sysfs.c b/drivers/gpu/drm/i915/gt/intel_engine_sysfs.c index 86377a4ffe70..25012297aa9e 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_sysfs.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_sysfs.c @@ -223,6 +223,50 @@ stop_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) static struct kobj_attribute stop_timeout_attr = __ATTR(stop_timeout_ms, 0644, stop_show, stop_store); +static ssize_t +preempt_timeout_store(struct kobject *kobj, struct kobj_attribute *attr, + const char *buf, size_t count) +{ + struct intel_engine_cs *engine = kobj_to_engine(kobj); + unsigned long long timeout; + int err; + + /* + * After initialising a preemption request, we give the current + * resident a small amount of time to vacate the GPU. The preemption + * request is for a higher priority context and should be immediate to + * maintain high quality of service (and avoid priority inversion). + * However, the preemption granularity of the GPU can be quite coarse + * and so we need a compromise. + */ + + err = kstrtoull(buf, 0, &timeout); + if (err) + return err; + + if (timeout > jiffies_to_msecs(MAX_SCHEDULE_TIMEOUT)) + return -EINVAL; + + WRITE_ONCE(engine->props.preempt_timeout_ms, timeout); + + if (READ_ONCE(engine->execlists.pending[0])) + set_timer_ms(&engine->execlists.preempt, timeout); + + return count; +} + +static ssize_t +preempt_timeout_show(struct kobject *kobj, struct kobj_attribute *attr, + char *buf) +{ + struct intel_engine_cs *engine = kobj_to_engine(kobj); + + return sprintf(buf, "%lu\n", engine->props.preempt_timeout_ms); +} + +static struct kobj_attribute preempt_timeout_attr = +__ATTR(preempt_timeout_ms, 0644, preempt_timeout_show, preempt_timeout_store); + static void kobj_engine_release(struct kobject *kobj) { kfree(kobj); @@ -292,6 +336,10 @@ void intel_engines_add_sysfs(struct drm_i915_private *i915) sysfs_create_file(kobj, ×lice_duration_attr.attr)) goto err_engine; + if (intel_engine_has_preempt_reset(engine) && + sysfs_create_file(kobj, &preempt_timeout_attr.attr)) + goto err_engine; + if (0) { err_object: kobject_put(kobj); -- 2.24.0.rc0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: Chris Wilson <chris@chris-wilson.co.uk> To: intel-gfx@lists.freedesktop.org Subject: [Intel-gfx] [PATCH 07/11] drm/i915/gt: Expose preempt reset timeout via sysfs Date: Thu, 24 Oct 2019 12:40:24 +0100 [thread overview] Message-ID: <20191024114028.6170-8-chris@chris-wilson.co.uk> (raw) Message-ID: <20191024114024.4VyV3RlCKkxz716uEBWX4LwzlnUgmHXbA3KqiyzoTbU@z> (raw) In-Reply-To: <20191024114028.6170-1-chris@chris-wilson.co.uk> After initialising a preemption request, we give the current resident a small amount of time to vacate the GPU. The preemption request is for a higher priority context and should be immediate to maintain high quality of service (and avoid priority inversion). However, the preemption granularity of the GPU can be quite coarse and so we need a compromise. The preempt timeout can be adjusted per-engine using, /sys/class/drm/card?/engine/*/preempt_timeout_ms and can be disabled by setting it to 0. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/Kconfig.profile | 3 ++ drivers/gpu/drm/i915/gt/intel_engine_sysfs.c | 48 ++++++++++++++++++++ 2 files changed, 51 insertions(+) diff --git a/drivers/gpu/drm/i915/Kconfig.profile b/drivers/gpu/drm/i915/Kconfig.profile index 76145d25ce65..066ea9ba2756 100644 --- a/drivers/gpu/drm/i915/Kconfig.profile +++ b/drivers/gpu/drm/i915/Kconfig.profile @@ -33,6 +33,9 @@ config DRM_I915_PREEMPT_TIMEOUT expires, the HW will be reset to allow the more important context to execute. + This is adjustable via + /sys/class/drm/card?/engine/*/preempt_timeout_ms + May be 0 to disable the timeout. config DRM_I915_SPIN_REQUEST diff --git a/drivers/gpu/drm/i915/gt/intel_engine_sysfs.c b/drivers/gpu/drm/i915/gt/intel_engine_sysfs.c index 86377a4ffe70..25012297aa9e 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_sysfs.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_sysfs.c @@ -223,6 +223,50 @@ stop_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) static struct kobj_attribute stop_timeout_attr = __ATTR(stop_timeout_ms, 0644, stop_show, stop_store); +static ssize_t +preempt_timeout_store(struct kobject *kobj, struct kobj_attribute *attr, + const char *buf, size_t count) +{ + struct intel_engine_cs *engine = kobj_to_engine(kobj); + unsigned long long timeout; + int err; + + /* + * After initialising a preemption request, we give the current + * resident a small amount of time to vacate the GPU. The preemption + * request is for a higher priority context and should be immediate to + * maintain high quality of service (and avoid priority inversion). + * However, the preemption granularity of the GPU can be quite coarse + * and so we need a compromise. + */ + + err = kstrtoull(buf, 0, &timeout); + if (err) + return err; + + if (timeout > jiffies_to_msecs(MAX_SCHEDULE_TIMEOUT)) + return -EINVAL; + + WRITE_ONCE(engine->props.preempt_timeout_ms, timeout); + + if (READ_ONCE(engine->execlists.pending[0])) + set_timer_ms(&engine->execlists.preempt, timeout); + + return count; +} + +static ssize_t +preempt_timeout_show(struct kobject *kobj, struct kobj_attribute *attr, + char *buf) +{ + struct intel_engine_cs *engine = kobj_to_engine(kobj); + + return sprintf(buf, "%lu\n", engine->props.preempt_timeout_ms); +} + +static struct kobj_attribute preempt_timeout_attr = +__ATTR(preempt_timeout_ms, 0644, preempt_timeout_show, preempt_timeout_store); + static void kobj_engine_release(struct kobject *kobj) { kfree(kobj); @@ -292,6 +336,10 @@ void intel_engines_add_sysfs(struct drm_i915_private *i915) sysfs_create_file(kobj, ×lice_duration_attr.attr)) goto err_engine; + if (intel_engine_has_preempt_reset(engine) && + sysfs_create_file(kobj, &preempt_timeout_attr.attr)) + goto err_engine; + if (0) { err_object: kobject_put(kobj); -- 2.24.0.rc0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2019-10-24 11:40 UTC|newest] Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-10-24 11:40 CI testing of persistence and sysfs Chris Wilson 2019-10-24 11:40 ` [Intel-gfx] " Chris Wilson 2019-10-24 11:40 ` [PATCH 01/11] drm/i915/gem: Make context persistence optional Chris Wilson 2019-10-24 11:40 ` [Intel-gfx] " Chris Wilson 2019-10-25 9:10 ` Joonas Lahtinen 2019-10-25 9:10 ` [Intel-gfx] " Joonas Lahtinen 2019-10-25 18:22 ` Jason Ekstrand 2019-10-25 18:22 ` [Intel-gfx] " Jason Ekstrand 2019-10-25 21:29 ` Chris Wilson 2019-10-25 21:29 ` [Intel-gfx] " Chris Wilson 2019-10-29 16:19 ` Jason Ekstrand 2019-10-29 16:19 ` [Intel-gfx] " Jason Ekstrand 2019-10-29 18:02 ` Chris Wilson 2019-10-29 18:02 ` [Intel-gfx] " Chris Wilson 2019-10-24 11:40 ` [PATCH 02/11] drm/i915: Put future HW and their uAPIs under STAGING & BROKEN Chris Wilson 2019-10-24 11:40 ` [Intel-gfx] " Chris Wilson 2019-10-24 23:25 ` David Airlie 2019-10-24 23:25 ` [Intel-gfx] " David Airlie 2019-10-24 23:35 ` Rodrigo Vivi 2019-10-24 23:35 ` [Intel-gfx] " Rodrigo Vivi 2019-10-25 7:09 ` Jani Nikula 2019-10-25 7:09 ` [Intel-gfx] " Jani Nikula 2019-10-24 11:40 ` [PATCH 03/11] drm/i915/gt: Expose engine properties via sysfs Chris Wilson 2019-10-24 11:40 ` [Intel-gfx] " Chris Wilson 2019-10-24 11:40 ` [PATCH 04/11] drm/i915/gt: Expose engine->mmio_base " Chris Wilson 2019-10-24 11:40 ` [Intel-gfx] " Chris Wilson 2019-10-24 11:40 ` [PATCH 05/11] drm/i915/gt: Expose timeslice duration to sysfs Chris Wilson 2019-10-24 11:40 ` [Intel-gfx] " Chris Wilson 2019-10-24 11:40 ` [PATCH 06/11] drm/i915/gt: Expose reset stop timeout via sysfs Chris Wilson 2019-10-24 11:40 ` [Intel-gfx] " Chris Wilson 2019-10-24 11:40 ` Chris Wilson [this message] 2019-10-24 11:40 ` [Intel-gfx] [PATCH 07/11] drm/i915/gt: Expose preempt reset " Chris Wilson 2019-10-24 11:40 ` [PATCH 08/11] drm/i915/gt: Expose heartbeat interval " Chris Wilson 2019-10-24 11:40 ` [Intel-gfx] " Chris Wilson 2019-10-24 11:40 ` [PATCH 09/11] drm/i915: Flush idle barriers when waiting Chris Wilson 2019-10-24 11:40 ` [Intel-gfx] " Chris Wilson 2019-10-24 11:40 ` [PATCH 10/11] drm/i915: Allow userspace to specify ringsize on construction Chris Wilson 2019-10-24 11:40 ` [Intel-gfx] " Chris Wilson 2019-10-24 11:40 ` [PATCH 11/11] drm/i915/gem: Honour O_NONBLOCK before throttling execbuf submissions Chris Wilson 2019-10-24 11:40 ` [Intel-gfx] " Chris Wilson
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