From: Lee Shawn C <shawn.c.lee@intel.com> To: intel-gfx@lists.freedesktop.org Cc: Cooper Chiou <cooper.chiou@intel.com>, Jani Nikula <jani.nikula@intel.com>, Lucas De Marchi <lucas.demarchi@intel.com> Subject: [PATCH 2/2] drm/i915/cml: Separate U sereis pci id from origianl list. Date: Fri, 25 Oct 2019 23:49:33 +0800 [thread overview] Message-ID: <20191025154933.22607-2-shawn.c.lee@intel.com> (raw) In-Reply-To: <20191025154933.22607-1-shawn.c.lee@intel.com> U series device need different DDI buffer setup for eDP and DP. If driver did not recognize ULT id proerply. The setting for H and S series would be used. Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Cc: Cooper Chiou <cooper.chiou@intel.com> Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com> --- drivers/gpu/drm/i915/i915_pci.c | 2 ++ drivers/gpu/drm/i915/intel_device_info.c | 2 ++ include/drm/i915_pciids.h | 20 +++++++++++++------- 3 files changed, 17 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index bd9211b3d76e..e876621f6aaf 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -863,6 +863,8 @@ static const struct pci_device_id pciidlist[] = { INTEL_WHL_U_GT3_IDS(&intel_coffeelake_gt3_info), INTEL_CML_GT1_IDS(&intel_coffeelake_gt1_info), INTEL_CML_GT2_IDS(&intel_coffeelake_gt2_info), + INTEL_CML_U_GT1_IDS(&intel_coffeelake_gt1_info), + INTEL_CML_U_GT2_IDS(&intel_coffeelake_gt2_info), INTEL_CNL_IDS(&intel_cannonlake_info), INTEL_ICL_11_IDS(&intel_icelake_11_info), INTEL_EHL_IDS(&intel_elkhartlake_info), diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c index f99c9fd497b2..82d3b193eaec 100644 --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -775,6 +775,8 @@ static const u16 subplatform_ult_ids[] = { INTEL_WHL_U_GT1_IDS(0), INTEL_WHL_U_GT2_IDS(0), INTEL_WHL_U_GT3_IDS(0), + INTEL_CML_U_GT1_IDS(0), + INTEL_CML_U_GT2_IDS(0) }; static const u16 subplatform_ulx_ids[] = { diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index 56e823cdc717..02f10c4f5ec7 100644 --- a/include/drm/i915_pciids.h +++ b/include/drm/i915_pciids.h @@ -446,24 +446,28 @@ /* CML GT1 */ #define INTEL_CML_GT1_IDS(info) \ - INTEL_VGA_DEVICE(0x9B21, info), \ - INTEL_VGA_DEVICE(0x9BAA, info), \ - INTEL_VGA_DEVICE(0x9BAC, info), \ INTEL_VGA_DEVICE(0x9BA5, info), \ INTEL_VGA_DEVICE(0x9BA8, info), \ INTEL_VGA_DEVICE(0x9BA4, info), \ INTEL_VGA_DEVICE(0x9BA2, info) +#define INTEL_CML_U_GT1_IDS(info) \ + INTEL_VGA_DEVICE(0x9B21, info), \ + INTEL_VGA_DEVICE(0x9BAA, info), \ + INTEL_VGA_DEVICE(0x9BAC, info) + /* CML GT2 */ #define INTEL_CML_GT2_IDS(info) \ - INTEL_VGA_DEVICE(0x9B41, info), \ - INTEL_VGA_DEVICE(0x9BCA, info), \ - INTEL_VGA_DEVICE(0x9BCC, info), \ INTEL_VGA_DEVICE(0x9BC5, info), \ INTEL_VGA_DEVICE(0x9BC8, info), \ INTEL_VGA_DEVICE(0x9BC4, info), \ INTEL_VGA_DEVICE(0x9BC2, info) +#define INTEL_CML_U_GT2_IDS(info) \ + INTEL_VGA_DEVICE(0x9B41, info), \ + INTEL_VGA_DEVICE(0x9BCA, info), \ + INTEL_VGA_DEVICE(0x9BCC, info) + #define INTEL_KBL_IDS(info) \ INTEL_KBL_GT1_IDS(info), \ INTEL_KBL_GT2_IDS(info), \ @@ -529,7 +533,9 @@ INTEL_WHL_U_GT3_IDS(info), \ INTEL_AML_CFL_GT2_IDS(info), \ INTEL_CML_GT1_IDS(info), \ - INTEL_CML_GT2_IDS(info) + INTEL_CML_GT2_IDS(info), \ + INTEL_CML_U_GT1_IDS(info), \ + INTEL_CML_U_GT2_IDS(info) /* CNL */ #define INTEL_CNL_PORT_F_IDS(info) \ -- 2.17.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: Lee Shawn C <shawn.c.lee@intel.com> To: intel-gfx@lists.freedesktop.org Cc: Cooper Chiou <cooper.chiou@intel.com>, Jani Nikula <jani.nikula@intel.com>, Lucas De Marchi <lucas.demarchi@intel.com> Subject: [Intel-gfx] [PATCH 2/2] drm/i915/cml: Separate U sereis pci id from origianl list. Date: Fri, 25 Oct 2019 23:49:33 +0800 [thread overview] Message-ID: <20191025154933.22607-2-shawn.c.lee@intel.com> (raw) Message-ID: <20191025154933.shIlwau8-lNJdF52pJKQaxiJZS1hZILc2OwEMiUNz-E@z> (raw) In-Reply-To: <20191025154933.22607-1-shawn.c.lee@intel.com> U series device need different DDI buffer setup for eDP and DP. If driver did not recognize ULT id proerply. The setting for H and S series would be used. Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Cc: Cooper Chiou <cooper.chiou@intel.com> Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com> --- drivers/gpu/drm/i915/i915_pci.c | 2 ++ drivers/gpu/drm/i915/intel_device_info.c | 2 ++ include/drm/i915_pciids.h | 20 +++++++++++++------- 3 files changed, 17 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index bd9211b3d76e..e876621f6aaf 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -863,6 +863,8 @@ static const struct pci_device_id pciidlist[] = { INTEL_WHL_U_GT3_IDS(&intel_coffeelake_gt3_info), INTEL_CML_GT1_IDS(&intel_coffeelake_gt1_info), INTEL_CML_GT2_IDS(&intel_coffeelake_gt2_info), + INTEL_CML_U_GT1_IDS(&intel_coffeelake_gt1_info), + INTEL_CML_U_GT2_IDS(&intel_coffeelake_gt2_info), INTEL_CNL_IDS(&intel_cannonlake_info), INTEL_ICL_11_IDS(&intel_icelake_11_info), INTEL_EHL_IDS(&intel_elkhartlake_info), diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c index f99c9fd497b2..82d3b193eaec 100644 --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -775,6 +775,8 @@ static const u16 subplatform_ult_ids[] = { INTEL_WHL_U_GT1_IDS(0), INTEL_WHL_U_GT2_IDS(0), INTEL_WHL_U_GT3_IDS(0), + INTEL_CML_U_GT1_IDS(0), + INTEL_CML_U_GT2_IDS(0) }; static const u16 subplatform_ulx_ids[] = { diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index 56e823cdc717..02f10c4f5ec7 100644 --- a/include/drm/i915_pciids.h +++ b/include/drm/i915_pciids.h @@ -446,24 +446,28 @@ /* CML GT1 */ #define INTEL_CML_GT1_IDS(info) \ - INTEL_VGA_DEVICE(0x9B21, info), \ - INTEL_VGA_DEVICE(0x9BAA, info), \ - INTEL_VGA_DEVICE(0x9BAC, info), \ INTEL_VGA_DEVICE(0x9BA5, info), \ INTEL_VGA_DEVICE(0x9BA8, info), \ INTEL_VGA_DEVICE(0x9BA4, info), \ INTEL_VGA_DEVICE(0x9BA2, info) +#define INTEL_CML_U_GT1_IDS(info) \ + INTEL_VGA_DEVICE(0x9B21, info), \ + INTEL_VGA_DEVICE(0x9BAA, info), \ + INTEL_VGA_DEVICE(0x9BAC, info) + /* CML GT2 */ #define INTEL_CML_GT2_IDS(info) \ - INTEL_VGA_DEVICE(0x9B41, info), \ - INTEL_VGA_DEVICE(0x9BCA, info), \ - INTEL_VGA_DEVICE(0x9BCC, info), \ INTEL_VGA_DEVICE(0x9BC5, info), \ INTEL_VGA_DEVICE(0x9BC8, info), \ INTEL_VGA_DEVICE(0x9BC4, info), \ INTEL_VGA_DEVICE(0x9BC2, info) +#define INTEL_CML_U_GT2_IDS(info) \ + INTEL_VGA_DEVICE(0x9B41, info), \ + INTEL_VGA_DEVICE(0x9BCA, info), \ + INTEL_VGA_DEVICE(0x9BCC, info) + #define INTEL_KBL_IDS(info) \ INTEL_KBL_GT1_IDS(info), \ INTEL_KBL_GT2_IDS(info), \ @@ -529,7 +533,9 @@ INTEL_WHL_U_GT3_IDS(info), \ INTEL_AML_CFL_GT2_IDS(info), \ INTEL_CML_GT1_IDS(info), \ - INTEL_CML_GT2_IDS(info) + INTEL_CML_GT2_IDS(info), \ + INTEL_CML_U_GT1_IDS(info), \ + INTEL_CML_U_GT2_IDS(info) /* CNL */ #define INTEL_CNL_PORT_F_IDS(info) \ -- 2.17.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2019-10-25 7:50 UTC|newest] Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-10-25 15:49 [PATCH 1/2] drm/i915/cml: Remove unsupport PCI ID Lee Shawn C 2019-10-25 15:49 ` [Intel-gfx] " Lee Shawn C 2019-10-25 8:41 ` Jani Nikula 2019-10-25 8:41 ` [Intel-gfx] " Jani Nikula 2019-10-25 11:56 ` Lee, Shawn C 2019-10-25 11:56 ` [Intel-gfx] " Lee, Shawn C 2019-10-25 9:08 ` ✗ Fi.CI.BUILD: failure for series starting with [1/2] " Patchwork 2019-10-25 9:08 ` [Intel-gfx] " Patchwork 2019-10-25 15:49 ` Lee Shawn C [this message] 2019-10-25 15:49 ` [Intel-gfx] [PATCH 2/2] drm/i915/cml: Separate U sereis pci id from origianl list Lee Shawn C 2019-10-25 8:43 ` Jani Nikula 2019-10-25 8:43 ` [Intel-gfx] " Jani Nikula 2019-10-25 20:25 ` [PATCH v2 " Lee Shawn C 2019-10-25 20:25 ` [Intel-gfx] " Lee Shawn C 2019-10-25 19:34 ` Rodrigo Vivi 2019-10-25 19:34 ` [Intel-gfx] " Rodrigo Vivi 2019-10-25 17:17 ` ✗ Fi.CI.BUILD: failure for series starting with [v4] drm/i915/cml: Remove unsupport PCI ID (rev5) Patchwork 2019-10-25 17:17 ` [Intel-gfx] " Patchwork 2019-10-25 20:24 ` [PATCH v2 1/2] commit 'a7b4deeb02b9 ("drm/i915/cml: Add CML PCI IDS)' introduced new PCI ID that CML support. But some sku is not support yet so remove them Lee Shawn C 2019-10-25 20:24 ` [Intel-gfx] " Lee Shawn C 2019-10-25 20:29 ` [PATCH] drm/i915/cml: Remove unsupport PCI ID Lee Shawn C 2019-10-25 20:29 ` [Intel-gfx] " Lee Shawn C 2019-10-25 20:32 ` [PATCH v4] " Lee Shawn C 2019-10-25 20:32 ` [Intel-gfx] " Lee Shawn C 2019-10-25 16:59 ` James Ausmus 2019-10-25 16:59 ` [Intel-gfx] " James Ausmus 2019-10-28 17:03 ` [PATCH v6 1/2] " Lee Shawn C 2019-10-28 17:03 ` [Intel-gfx] " Lee Shawn C 2019-10-28 17:03 ` [PATCH v6 2/2] drm/i915/cml: Separate U series pci id from origianl list Lee Shawn C 2019-10-28 17:03 ` [Intel-gfx] " Lee Shawn C 2019-10-28 10:02 ` ✗ Fi.CI.BUILD: failure for series starting with [v6,2/2] drm/i915/cml: Separate U series pci id from origianl list. (rev7) Patchwork 2019-10-28 10:02 ` [Intel-gfx] " Patchwork
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