From: Ville Syrjala <ville.syrjala@linux.intel.com> To: intel-gfx@lists.freedesktop.org Subject: [PATCH 4/6] drm/i915: Configure overlay cc_out precision based on crtc gamma config Date: Mon, 28 Oct 2019 13:30:34 +0200 [thread overview] Message-ID: <20191028113036.27553-4-ville.syrjala@linux.intel.com> (raw) In-Reply-To: <20191028113036.27553-1-ville.syrjala@linux.intel.com> From: Ville Syrjälä <ville.syrjala@linux.intel.com> Put the overlay color conversion unit into 10bit mode if the pipe isn't using the 8bit legacy gamma. Not 100% sure this is what the intention of the bit was but makes at least some sense to me. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/i915/display/intel_overlay.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c index 23829374f751..e51592e35efe 100644 --- a/drivers/gpu/drm/i915/display/intel_overlay.c +++ b/drivers/gpu/drm/i915/display/intel_overlay.c @@ -777,9 +777,13 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay, intel_frontbuffer_flush(new_bo->frontbuffer, ORIGIN_DIRTYFB); if (!overlay->active) { - u32 oconfig; + const struct intel_crtc_state *crtc_state = + overlay->crtc->config; + u32 oconfig = 0; - oconfig = OCONF_CC_OUT_8BIT; + if (crtc_state->gamma_enable && + crtc_state->gamma_mode == GAMMA_MODE_MODE_8BIT) + oconfig |= OCONF_CC_OUT_8BIT; if (IS_GEN(dev_priv, 4)) oconfig |= OCONF_CSC_MODE_BT709; oconfig |= pipe == 0 ? -- 2.21.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: Ville Syrjala <ville.syrjala@linux.intel.com> To: intel-gfx@lists.freedesktop.org Subject: [Intel-gfx] [PATCH 4/6] drm/i915: Configure overlay cc_out precision based on crtc gamma config Date: Mon, 28 Oct 2019 13:30:34 +0200 [thread overview] Message-ID: <20191028113036.27553-4-ville.syrjala@linux.intel.com> (raw) Message-ID: <20191028113034.4Nq0b-ai615Vjiyvh6n08l6B0tiTUYt5YCJTaWeaItg@z> (raw) In-Reply-To: <20191028113036.27553-1-ville.syrjala@linux.intel.com> From: Ville Syrjälä <ville.syrjala@linux.intel.com> Put the overlay color conversion unit into 10bit mode if the pipe isn't using the 8bit legacy gamma. Not 100% sure this is what the intention of the bit was but makes at least some sense to me. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/i915/display/intel_overlay.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c index 23829374f751..e51592e35efe 100644 --- a/drivers/gpu/drm/i915/display/intel_overlay.c +++ b/drivers/gpu/drm/i915/display/intel_overlay.c @@ -777,9 +777,13 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay, intel_frontbuffer_flush(new_bo->frontbuffer, ORIGIN_DIRTYFB); if (!overlay->active) { - u32 oconfig; + const struct intel_crtc_state *crtc_state = + overlay->crtc->config; + u32 oconfig = 0; - oconfig = OCONF_CC_OUT_8BIT; + if (crtc_state->gamma_enable && + crtc_state->gamma_mode == GAMMA_MODE_MODE_8BIT) + oconfig |= OCONF_CC_OUT_8BIT; if (IS_GEN(dev_priv, 4)) oconfig |= OCONF_CSC_MODE_BT709; oconfig |= pipe == 0 ? -- 2.21.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2019-10-28 11:30 UTC|newest] Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-10-28 11:30 [PATCH 1/6] drm/i915: Fix i845/i865 cursor width Ville Syrjala 2019-10-28 11:30 ` [Intel-gfx] " Ville Syrjala 2019-10-28 11:30 ` [PATCH 2/6] drm/i915: Fix max cursor size for i915g/gm Ville Syrjala 2019-10-28 11:30 ` [Intel-gfx] " Ville Syrjala 2020-05-15 16:31 ` Chris Wilson 2019-10-28 11:30 ` [PATCH 3/6] drm/i915: Fix overlay colorkey for 30bpp and 8bpp Ville Syrjala 2019-10-28 11:30 ` [Intel-gfx] " Ville Syrjala 2020-05-15 16:38 ` Chris Wilson 2019-10-28 11:30 ` Ville Syrjala [this message] 2019-10-28 11:30 ` [Intel-gfx] [PATCH 4/6] drm/i915: Configure overlay cc_out precision based on crtc gamma config Ville Syrjala 2020-05-15 16:40 ` Chris Wilson 2019-10-28 11:30 ` [PATCH 5/6] drm/i915: Enable pipe gamma for the overlay Ville Syrjala 2019-10-28 11:30 ` [Intel-gfx] " Ville Syrjala 2020-05-15 16:40 ` Chris Wilson 2019-10-28 11:30 ` [PATCH 6/6] drm/i915: Protect overlay colorkey macro arguments Ville Syrjala 2019-10-28 11:30 ` [Intel-gfx] " Ville Syrjala 2020-05-15 16:41 ` Chris Wilson 2019-10-28 14:20 ` [PATCH 1/6] drm/i915: Fix i845/i865 cursor width Maarten Lankhorst 2019-10-28 14:20 ` [Intel-gfx] " Maarten Lankhorst 2019-10-28 15:05 ` Ville Syrjälä 2019-10-28 15:05 ` [Intel-gfx] " Ville Syrjälä 2019-10-28 15:57 ` Maarten Lankhorst 2019-10-28 15:57 ` [Intel-gfx] " Maarten Lankhorst 2019-10-28 14:43 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/6] " Patchwork 2019-10-28 14:43 ` [Intel-gfx] " Patchwork 2019-10-28 15:04 ` ✓ Fi.CI.BAT: success " Patchwork 2019-10-28 15:04 ` [Intel-gfx] " Patchwork 2019-10-29 10:10 ` ✗ Fi.CI.IGT: failure " Patchwork 2019-10-29 10:10 ` [Intel-gfx] " Patchwork
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