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From: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: nanley.g.chery@intel.com, dhinakaran.pandiyan@intel.com,
	ville.syrjala@intel.com
Subject: [PATCH v6 03/10] drm/i915: Move CCS stride alignment W/A inside intel_fb_stride_alignment
Date: Mon, 28 Oct 2019 13:40:34 -0700	[thread overview]
Message-ID: <20191028204041.13507-4-radhakrishna.sripada@intel.com> (raw)
In-Reply-To: <20191028204041.13507-1-radhakrishna.sripada@intel.com>

From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>

Easier to read if all the alignment changes are in one place and contained
within a function.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 31 ++++++++++----------
 1 file changed, 16 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 3796547ba018..b8ef99eac254 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2573,7 +2573,22 @@ intel_fb_stride_alignment(const struct drm_framebuffer *fb, int color_plane)
 		else
 			return 64;
 	} else {
-		return intel_tile_width_bytes(fb, color_plane);
+		u32 tile_width = intel_tile_width_bytes(fb, color_plane);
+
+		/*
+		 * Display WA #0531: skl,bxt,kbl,glk
+		 *
+		 * Render decompression and plane width > 3840
+		 * combined with horizontal panning requires the
+		 * plane stride to be a multiple of 4. We'll just
+		 * require the entire fb to accommodate that to avoid
+		 * potential runtime errors at plane configuration time.
+		 */
+		if (IS_GEN(dev_priv, 9) && is_ccs_modifier(fb->modifier) &&
+		    color_plane == 0 && fb->width > 3840)
+			tile_width *= 4;
+
+		return tile_width;
 	}
 }
 
@@ -16306,20 +16321,6 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
 		}
 
 		stride_alignment = intel_fb_stride_alignment(fb, i);
-
-		/*
-		 * Display WA #0531: skl,bxt,kbl,glk
-		 *
-		 * Render decompression and plane width > 3840
-		 * combined with horizontal panning requires the
-		 * plane stride to be a multiple of 4. We'll just
-		 * require the entire fb to accommodate that to avoid
-		 * potential runtime errors at plane configuration time.
-		 */
-		if (IS_GEN(dev_priv, 9) && i == 0 && fb->width > 3840 &&
-		    is_ccs_modifier(fb->modifier))
-			stride_alignment *= 4;
-
 		if (fb->pitches[i] & (stride_alignment - 1)) {
 			DRM_DEBUG_KMS("plane %d pitch (%d) must be at least %u byte aligned\n",
 				      i, fb->pitches[i], stride_alignment);
-- 
2.20.1

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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: nanley.g.chery@intel.com, dhinakaran.pandiyan@intel.com,
	ville.syrjala@intel.com
Subject: [Intel-gfx] [PATCH v6 03/10] drm/i915: Move CCS stride alignment W/A inside intel_fb_stride_alignment
Date: Mon, 28 Oct 2019 13:40:34 -0700	[thread overview]
Message-ID: <20191028204041.13507-4-radhakrishna.sripada@intel.com> (raw)
Message-ID: <20191028204034.lDjJ13QfeIvlKMviaykjOm9lijML4DpDDVf7fGQL3Zc@z> (raw)
In-Reply-To: <20191028204041.13507-1-radhakrishna.sripada@intel.com>

From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>

Easier to read if all the alignment changes are in one place and contained
within a function.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 31 ++++++++++----------
 1 file changed, 16 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 3796547ba018..b8ef99eac254 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2573,7 +2573,22 @@ intel_fb_stride_alignment(const struct drm_framebuffer *fb, int color_plane)
 		else
 			return 64;
 	} else {
-		return intel_tile_width_bytes(fb, color_plane);
+		u32 tile_width = intel_tile_width_bytes(fb, color_plane);
+
+		/*
+		 * Display WA #0531: skl,bxt,kbl,glk
+		 *
+		 * Render decompression and plane width > 3840
+		 * combined with horizontal panning requires the
+		 * plane stride to be a multiple of 4. We'll just
+		 * require the entire fb to accommodate that to avoid
+		 * potential runtime errors at plane configuration time.
+		 */
+		if (IS_GEN(dev_priv, 9) && is_ccs_modifier(fb->modifier) &&
+		    color_plane == 0 && fb->width > 3840)
+			tile_width *= 4;
+
+		return tile_width;
 	}
 }
 
@@ -16306,20 +16321,6 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
 		}
 
 		stride_alignment = intel_fb_stride_alignment(fb, i);
-
-		/*
-		 * Display WA #0531: skl,bxt,kbl,glk
-		 *
-		 * Render decompression and plane width > 3840
-		 * combined with horizontal panning requires the
-		 * plane stride to be a multiple of 4. We'll just
-		 * require the entire fb to accommodate that to avoid
-		 * potential runtime errors at plane configuration time.
-		 */
-		if (IS_GEN(dev_priv, 9) && i == 0 && fb->width > 3840 &&
-		    is_ccs_modifier(fb->modifier))
-			stride_alignment *= 4;
-
 		if (fb->pitches[i] & (stride_alignment - 1)) {
 			DRM_DEBUG_KMS("plane %d pitch (%d) must be at least %u byte aligned\n",
 				      i, fb->pitches[i], stride_alignment);
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2019-10-28 20:38 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-28 20:40 [PATCH v6 00/10] Clear Color Support for TGL Render Decompression Radhakrishna Sripada
2019-10-28 20:40 ` [Intel-gfx] " Radhakrishna Sripada
2019-10-28 20:40 ` [PATCH v6 01/10] drm/framebuffer: Format modifier for Intel Gen-12 render compression Radhakrishna Sripada
2019-10-28 20:40   ` [Intel-gfx] " Radhakrishna Sripada
2019-10-28 20:40 ` [PATCH v6 02/10] drm/i915: Use intel_tile_height() instead of re-implementing Radhakrishna Sripada
2019-10-28 20:40   ` [Intel-gfx] " Radhakrishna Sripada
2019-10-28 20:40 ` Radhakrishna Sripada [this message]
2019-10-28 20:40   ` [Intel-gfx] [PATCH v6 03/10] drm/i915: Move CCS stride alignment W/A inside intel_fb_stride_alignment Radhakrishna Sripada
2019-10-28 20:40 ` [PATCH v6 04/10] drm/i915/tgl: Gen-12 render decompression Radhakrishna Sripada
2019-10-28 20:40   ` [Intel-gfx] " Radhakrishna Sripada
2019-10-28 20:40 ` [PATCH v6 05/10] drm/i915: Extract framebufer CCS offset checks into a function Radhakrishna Sripada
2019-10-28 20:40   ` [Intel-gfx] " Radhakrishna Sripada
2019-10-28 20:40 ` [PATCH v6 06/10] drm/framebuffer: Format modifier for Intel Gen-12 media compression Radhakrishna Sripada
2019-10-28 20:40   ` [Intel-gfx] " Radhakrishna Sripada
2019-10-28 20:40 ` [PATCH v6 07/10] drm/fb: Extend format_info member arrays to handle four planes Radhakrishna Sripada
2019-10-28 20:40   ` [Intel-gfx] " Radhakrishna Sripada
2019-10-28 20:40 ` [PATCH v6 08/10] Gen-12 display can decompress surfaces compressed by the media engine Radhakrishna Sripada
2019-10-28 20:40   ` [Intel-gfx] " Radhakrishna Sripada
2019-10-28 20:40 ` [PATCH v6 09/10] drm/framebuffer/tgl: Format modifier for Intel Gen 12 render compression with Clear Color Radhakrishna Sripada
2019-10-28 20:40   ` [Intel-gfx] " Radhakrishna Sripada
2019-10-30  0:05   ` Chery, Nanley G
2019-10-30  0:05     ` [Intel-gfx] " Chery, Nanley G
2019-11-01  7:00     ` Sripada, Radhakrishna
2019-11-01  7:00       ` [Intel-gfx] " Sripada, Radhakrishna
2019-11-12 17:40       ` Chery, Nanley G
2019-11-12 17:40         ` [Intel-gfx] " Chery, Nanley G
2019-11-13 22:33         ` Chery, Nanley G
2019-11-13 22:33           ` [Intel-gfx] " Chery, Nanley G
2019-10-28 20:40 ` [PATCH v6 10/10] drm/i915/tgl: Add Clear Color support for TGL Render Decompression Radhakrishna Sripada
2019-10-28 20:40   ` [Intel-gfx] " Radhakrishna Sripada
2019-10-29  0:02 ` ✗ Fi.CI.CHECKPATCH: warning for Clear Color Support for TGL Render Decompression (rev9) Patchwork
2019-10-29  0:02   ` [Intel-gfx] " Patchwork
2019-10-29  0:49 ` ✗ Fi.CI.BAT: failure " Patchwork
2019-10-29  0:49   ` [Intel-gfx] " Patchwork

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