From: Chris Wilson <chris@chris-wilson.co.uk> To: intel-gfx@lists.freedesktop.org Subject: [PATCH 5/5] drm/i915: Defer rc6 shutdown to suspend_late Date: Wed, 30 Oct 2019 10:38:27 +0000 [thread overview] Message-ID: <20191030103827.2413-5-chris@chris-wilson.co.uk> (raw) In-Reply-To: <20191030103827.2413-1-chris@chris-wilson.co.uk> Currently we shutdown rc6 during i915_gem_resume() but this is called during the preparation phase (i915_drm_prepare) for all suspend paths, but we only want to shutdown rc6 for S3+. Move the actual shutdown to i915_gem_suspend_late(). We then need to differentiate between suspend targets, to distinguish S0 (s2idle) where the device is kept awake but needs to be in a low power mode (the same as runtime suspend) from the device suspend levels where we lose control of HW and so must disable any HW access to dangling memory. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111909 Fixes: c113236718e8 ("drm/i915: Extract GT render sleep (rc6) management") Testcase: igt/gem_exec_suspend/power-S0 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Andi Shyti <andi.shyti@intel.com> --- drivers/gpu/drm/i915/gem/i915_gem_pm.c | 4 +++- drivers/gpu/drm/i915/gt/intel_gt_pm.c | 30 +++++++++++++++++++----- drivers/gpu/drm/i915/gt/intel_gt_pm.h | 3 ++- drivers/gpu/drm/i915/gt/intel_rc6.c | 5 ++++ drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 2 +- 5 files changed, 35 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_pm.c index 6779ab34101b..f88ee1317bb4 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c @@ -27,7 +27,7 @@ void i915_gem_suspend(struct drm_i915_private *i915) * state. Fortunately, the kernel_context is disposable and we do * not rely on its state. */ - intel_gt_suspend(&i915->gt); + intel_gt_suspend_prepare(&i915->gt); i915_gem_drain_freed_objects(i915); } @@ -69,6 +69,8 @@ void i915_gem_suspend_late(struct drm_i915_private *i915) * machine in an unusable condition. */ + intel_gt_suspend_late(&i915->gt); + spin_lock_irqsave(&i915->mm.obj_lock, flags); for (phase = phases; *phase; phase++) { LIST_HEAD(keep); diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c index 11661de8c40b..09f59acf5e63 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c @@ -4,6 +4,8 @@ * Copyright © 2019 Intel Corporation */ +#include <linux/suspend.h> + #include "i915_drv.h" #include "i915_globals.h" #include "i915_params.h" @@ -236,8 +238,13 @@ int intel_gt_resume(struct intel_gt *gt) return err; } -static void wait_for_idle(struct intel_gt *gt) +void intel_gt_suspend_prepare(struct intel_gt *gt) { + if (!intel_gt_pm_is_awake(gt)) + return; + + user_forcewake(gt, true); + if (intel_gt_wait_for_idle(gt, I915_GEM_IDLE_TIMEOUT) == -ETIME) { /* * Forcibly cancel outstanding work and leave @@ -247,18 +254,29 @@ static void wait_for_idle(struct intel_gt *gt) } intel_gt_pm_wait_for_idle(gt); + + intel_uc_suspend(>->uc); } -void intel_gt_suspend(struct intel_gt *gt) +void intel_gt_suspend_late(struct intel_gt *gt) { intel_wakeref_t wakeref; - user_forcewake(gt, true); - /* We expect to be idle already; but also want to be independent */ - wait_for_idle(gt); + intel_gt_suspend_prepare(gt); - intel_uc_suspend(>->uc); + /* + * On disabling the device, we want to turn off HW access to memory + * that we no longer own. + * + * However, not all suspend-states disable the device. S0 (s2idle) + * is effectively runtime-suspend, the device is left powered on + * but needs to be put into a low power state. We need to keep + * powermanagement enabled, but we also retain system state and so + * it remains safe to keep on using our allocated memory. + */ + if (pm_suspend_target_state == PM_SUSPEND_TO_IDLE) + return; with_intel_runtime_pm(gt->uncore->rpm, wakeref) { intel_rps_disable(>->rps); diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.h b/drivers/gpu/drm/i915/gt/intel_gt_pm.h index d924c984c74d..b3e17399be9b 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_pm.h +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.h @@ -43,8 +43,9 @@ void intel_gt_pm_fini(struct intel_gt *gt); void intel_gt_sanitize(struct intel_gt *gt, bool force); +void intel_gt_suspend_prepare(struct intel_gt *gt); +void intel_gt_suspend_late(struct intel_gt *gt); int intel_gt_resume(struct intel_gt *gt); -void intel_gt_suspend(struct intel_gt *gt); void intel_gt_runtime_suspend(struct intel_gt *gt); int intel_gt_runtime_resume(struct intel_gt *gt); diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c index 70f0e01a38b9..5ad4a92a9582 100644 --- a/drivers/gpu/drm/i915/gt/intel_rc6.c +++ b/drivers/gpu/drm/i915/gt/intel_rc6.c @@ -525,6 +525,11 @@ void intel_rc6_init(struct intel_rc6 *rc6) void intel_rc6_sanitize(struct intel_rc6 *rc6) { + if (rc6->enabled) { /* unbalanced suspend/resume */ + rpm_get(rc6); + rc6->enabled = false; + } + if (rc6->supported) __intel_rc6_disable(rc6); } diff --git a/drivers/gpu/drm/i915/gt/selftest_gt_pm.c b/drivers/gpu/drm/i915/gt/selftest_gt_pm.c index 5d429037cdad..3d4e6a008af8 100644 --- a/drivers/gpu/drm/i915/gt/selftest_gt_pm.c +++ b/drivers/gpu/drm/i915/gt/selftest_gt_pm.c @@ -15,7 +15,7 @@ static int live_gt_resume(void *arg) /* Do several suspend/resume cycles to check we don't explode! */ do { - intel_gt_suspend(gt); + intel_gt_suspend_late(gt); if (gt->rc6.enabled) { pr_err("rc6 still enabled after suspend!\n"); -- 2.24.0.rc1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: Chris Wilson <chris@chris-wilson.co.uk> To: intel-gfx@lists.freedesktop.org Subject: [Intel-gfx] [PATCH 5/5] drm/i915: Defer rc6 shutdown to suspend_late Date: Wed, 30 Oct 2019 10:38:27 +0000 [thread overview] Message-ID: <20191030103827.2413-5-chris@chris-wilson.co.uk> (raw) Message-ID: <20191030103827.aEVDEvebIej_KsW7iNCUu7Ae_kFFnEDtogOYLwkVJEY@z> (raw) In-Reply-To: <20191030103827.2413-1-chris@chris-wilson.co.uk> Currently we shutdown rc6 during i915_gem_resume() but this is called during the preparation phase (i915_drm_prepare) for all suspend paths, but we only want to shutdown rc6 for S3+. Move the actual shutdown to i915_gem_suspend_late(). We then need to differentiate between suspend targets, to distinguish S0 (s2idle) where the device is kept awake but needs to be in a low power mode (the same as runtime suspend) from the device suspend levels where we lose control of HW and so must disable any HW access to dangling memory. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111909 Fixes: c113236718e8 ("drm/i915: Extract GT render sleep (rc6) management") Testcase: igt/gem_exec_suspend/power-S0 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Andi Shyti <andi.shyti@intel.com> --- drivers/gpu/drm/i915/gem/i915_gem_pm.c | 4 +++- drivers/gpu/drm/i915/gt/intel_gt_pm.c | 30 +++++++++++++++++++----- drivers/gpu/drm/i915/gt/intel_gt_pm.h | 3 ++- drivers/gpu/drm/i915/gt/intel_rc6.c | 5 ++++ drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 2 +- 5 files changed, 35 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_pm.c index 6779ab34101b..f88ee1317bb4 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c @@ -27,7 +27,7 @@ void i915_gem_suspend(struct drm_i915_private *i915) * state. Fortunately, the kernel_context is disposable and we do * not rely on its state. */ - intel_gt_suspend(&i915->gt); + intel_gt_suspend_prepare(&i915->gt); i915_gem_drain_freed_objects(i915); } @@ -69,6 +69,8 @@ void i915_gem_suspend_late(struct drm_i915_private *i915) * machine in an unusable condition. */ + intel_gt_suspend_late(&i915->gt); + spin_lock_irqsave(&i915->mm.obj_lock, flags); for (phase = phases; *phase; phase++) { LIST_HEAD(keep); diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c index 11661de8c40b..09f59acf5e63 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c @@ -4,6 +4,8 @@ * Copyright © 2019 Intel Corporation */ +#include <linux/suspend.h> + #include "i915_drv.h" #include "i915_globals.h" #include "i915_params.h" @@ -236,8 +238,13 @@ int intel_gt_resume(struct intel_gt *gt) return err; } -static void wait_for_idle(struct intel_gt *gt) +void intel_gt_suspend_prepare(struct intel_gt *gt) { + if (!intel_gt_pm_is_awake(gt)) + return; + + user_forcewake(gt, true); + if (intel_gt_wait_for_idle(gt, I915_GEM_IDLE_TIMEOUT) == -ETIME) { /* * Forcibly cancel outstanding work and leave @@ -247,18 +254,29 @@ static void wait_for_idle(struct intel_gt *gt) } intel_gt_pm_wait_for_idle(gt); + + intel_uc_suspend(>->uc); } -void intel_gt_suspend(struct intel_gt *gt) +void intel_gt_suspend_late(struct intel_gt *gt) { intel_wakeref_t wakeref; - user_forcewake(gt, true); - /* We expect to be idle already; but also want to be independent */ - wait_for_idle(gt); + intel_gt_suspend_prepare(gt); - intel_uc_suspend(>->uc); + /* + * On disabling the device, we want to turn off HW access to memory + * that we no longer own. + * + * However, not all suspend-states disable the device. S0 (s2idle) + * is effectively runtime-suspend, the device is left powered on + * but needs to be put into a low power state. We need to keep + * powermanagement enabled, but we also retain system state and so + * it remains safe to keep on using our allocated memory. + */ + if (pm_suspend_target_state == PM_SUSPEND_TO_IDLE) + return; with_intel_runtime_pm(gt->uncore->rpm, wakeref) { intel_rps_disable(>->rps); diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.h b/drivers/gpu/drm/i915/gt/intel_gt_pm.h index d924c984c74d..b3e17399be9b 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_pm.h +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.h @@ -43,8 +43,9 @@ void intel_gt_pm_fini(struct intel_gt *gt); void intel_gt_sanitize(struct intel_gt *gt, bool force); +void intel_gt_suspend_prepare(struct intel_gt *gt); +void intel_gt_suspend_late(struct intel_gt *gt); int intel_gt_resume(struct intel_gt *gt); -void intel_gt_suspend(struct intel_gt *gt); void intel_gt_runtime_suspend(struct intel_gt *gt); int intel_gt_runtime_resume(struct intel_gt *gt); diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c index 70f0e01a38b9..5ad4a92a9582 100644 --- a/drivers/gpu/drm/i915/gt/intel_rc6.c +++ b/drivers/gpu/drm/i915/gt/intel_rc6.c @@ -525,6 +525,11 @@ void intel_rc6_init(struct intel_rc6 *rc6) void intel_rc6_sanitize(struct intel_rc6 *rc6) { + if (rc6->enabled) { /* unbalanced suspend/resume */ + rpm_get(rc6); + rc6->enabled = false; + } + if (rc6->supported) __intel_rc6_disable(rc6); } diff --git a/drivers/gpu/drm/i915/gt/selftest_gt_pm.c b/drivers/gpu/drm/i915/gt/selftest_gt_pm.c index 5d429037cdad..3d4e6a008af8 100644 --- a/drivers/gpu/drm/i915/gt/selftest_gt_pm.c +++ b/drivers/gpu/drm/i915/gt/selftest_gt_pm.c @@ -15,7 +15,7 @@ static int live_gt_resume(void *arg) /* Do several suspend/resume cycles to check we don't explode! */ do { - intel_gt_suspend(gt); + intel_gt_suspend_late(gt); if (gt->rc6.enabled) { pr_err("rc6 still enabled after suspend!\n"); -- 2.24.0.rc1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2019-10-30 10:38 UTC|newest] Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-10-30 10:38 [PATCH 1/5] drm/i915/gt: Always track callers to intel_rps_mark_interactive() Chris Wilson 2019-10-30 10:38 ` [Intel-gfx] " Chris Wilson 2019-10-30 10:38 ` [PATCH 2/5] drm/i915/gt: Call intel_gt_sanitize() directly Chris Wilson 2019-10-30 10:38 ` [Intel-gfx] " Chris Wilson 2019-11-01 14:04 ` Andi Shyti 2019-11-01 14:04 ` [Intel-gfx] " Andi Shyti 2019-10-30 10:38 ` [PATCH 3/5] drm/i915/gem: Leave reloading kernel context on resume to GT Chris Wilson 2019-10-30 10:38 ` [Intel-gfx] " Chris Wilson 2019-11-01 13:47 ` Andi Shyti 2019-11-01 13:47 ` [Intel-gfx] " Andi Shyti 2019-10-30 10:38 ` [PATCH 4/5] drm/i915/gt: Move user_forcewake application " Chris Wilson 2019-10-30 10:38 ` [Intel-gfx] " Chris Wilson 2019-11-01 13:42 ` Andi Shyti 2019-11-01 13:42 ` [Intel-gfx] " Andi Shyti 2019-10-30 10:38 ` Chris Wilson [this message] 2019-10-30 10:38 ` [Intel-gfx] [PATCH 5/5] drm/i915: Defer rc6 shutdown to suspend_late Chris Wilson 2019-10-30 23:57 ` Andi Shyti 2019-10-30 23:57 ` [Intel-gfx] " Andi Shyti 2019-10-30 11:06 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm/i915/gt: Always track callers to intel_rps_mark_interactive() Patchwork 2019-10-30 11:06 ` [Intel-gfx] " Patchwork 2019-10-30 11:30 ` ✓ Fi.CI.BAT: success " Patchwork 2019-10-30 11:30 ` [Intel-gfx] " Patchwork 2019-10-30 12:34 ` [PATCH 1/5] " Andi Shyti 2019-10-30 12:34 ` [Intel-gfx] " Andi Shyti 2019-10-31 11:55 ` ✓ Fi.CI.IGT: success for series starting with [1/5] " Patchwork 2019-10-31 11:55 ` [Intel-gfx] " Patchwork
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