From: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com> To: igt-dev@lists.freedesktop.org Cc: intel-gfx@lists.freedesktop.org Subject: [PATCH i-g-t v5 4/4] tests/gem_ctx_shared: Align objects using minimum GTT alignment Date: Mon, 4 Nov 2019 18:13:30 +0100 [thread overview] Message-ID: <20191104171330.24821-5-janusz.krzysztofik@linux.intel.com> (raw) In-Reply-To: <20191104171330.24821-1-janusz.krzysztofik@linux.intel.com> exec-shared-gtt-* subtests use hardcoded values for object size and softpin offset, based on 4kB GTT alignment assumption. That may result in those subtests failing when run on future backing stores with possibly larger minimum page sizes. Replace hardcoded constants with values calculated from minimum GTT alignment of actual backing store the test is running on. v2: Update helper name, use 'minimum GTT alignment' term across the change, adjust variable name. v3: Name the variable 'stride', not 'alignment', it better reflects its purpose (Chris). Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> --- tests/i915/gem_ctx_shared.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/tests/i915/gem_ctx_shared.c b/tests/i915/gem_ctx_shared.c index f7852482..cb726b4d 100644 --- a/tests/i915/gem_ctx_shared.c +++ b/tests/i915/gem_ctx_shared.c @@ -41,6 +41,7 @@ #include "igt_rand.h" #include "igt_vgem.h" #include "sync_file.h" +#include "i915/gem_gtt_topology.c" #define LO 0 #define HI 1 @@ -195,6 +196,7 @@ static void exec_shared_gtt(int i915, unsigned int ring) uint32_t scratch, *s; uint32_t batch, cs[16]; uint64_t offset; + uint64_t stride; int i; gem_require_ring(i915, ring); @@ -203,7 +205,8 @@ static void exec_shared_gtt(int i915, unsigned int ring) clone = gem_context_clone(i915, 0, I915_CONTEXT_CLONE_VM, 0); /* Find a hole big enough for both objects later */ - scratch = gem_create(i915, 16384); + stride = 2 * gem_gtt_min_alignment(i915); + scratch = gem_create(i915, 2 * stride); gem_write(i915, scratch, 0, &bbe, sizeof(bbe)); obj.handle = scratch; gem_execbuf(i915, &execbuf); @@ -246,7 +249,7 @@ static void exec_shared_gtt(int i915, unsigned int ring) gem_write(i915, batch, 0, cs, sizeof(cs)); obj.handle = batch; - obj.offset += 8192; /* make sure we don't cause an eviction! */ + obj.offset += stride; /* make sure we don't cause an eviction! */ execbuf.rsvd1 = clone; if (gen > 3 && gen < 6) execbuf.flags |= I915_EXEC_SECURE; -- 2.21.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com> To: igt-dev@lists.freedesktop.org Cc: intel-gfx@lists.freedesktop.org Subject: [Intel-gfx] [PATCH i-g-t v5 4/4] tests/gem_ctx_shared: Align objects using minimum GTT alignment Date: Mon, 4 Nov 2019 18:13:30 +0100 [thread overview] Message-ID: <20191104171330.24821-5-janusz.krzysztofik@linux.intel.com> (raw) Message-ID: <20191104171330.jfmzTL0pcXsZNOYkuWQ_65u9y3bRGzuAroDgqRhwLIc@z> (raw) In-Reply-To: <20191104171330.24821-1-janusz.krzysztofik@linux.intel.com> exec-shared-gtt-* subtests use hardcoded values for object size and softpin offset, based on 4kB GTT alignment assumption. That may result in those subtests failing when run on future backing stores with possibly larger minimum page sizes. Replace hardcoded constants with values calculated from minimum GTT alignment of actual backing store the test is running on. v2: Update helper name, use 'minimum GTT alignment' term across the change, adjust variable name. v3: Name the variable 'stride', not 'alignment', it better reflects its purpose (Chris). Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> --- tests/i915/gem_ctx_shared.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/tests/i915/gem_ctx_shared.c b/tests/i915/gem_ctx_shared.c index f7852482..cb726b4d 100644 --- a/tests/i915/gem_ctx_shared.c +++ b/tests/i915/gem_ctx_shared.c @@ -41,6 +41,7 @@ #include "igt_rand.h" #include "igt_vgem.h" #include "sync_file.h" +#include "i915/gem_gtt_topology.c" #define LO 0 #define HI 1 @@ -195,6 +196,7 @@ static void exec_shared_gtt(int i915, unsigned int ring) uint32_t scratch, *s; uint32_t batch, cs[16]; uint64_t offset; + uint64_t stride; int i; gem_require_ring(i915, ring); @@ -203,7 +205,8 @@ static void exec_shared_gtt(int i915, unsigned int ring) clone = gem_context_clone(i915, 0, I915_CONTEXT_CLONE_VM, 0); /* Find a hole big enough for both objects later */ - scratch = gem_create(i915, 16384); + stride = 2 * gem_gtt_min_alignment(i915); + scratch = gem_create(i915, 2 * stride); gem_write(i915, scratch, 0, &bbe, sizeof(bbe)); obj.handle = scratch; gem_execbuf(i915, &execbuf); @@ -246,7 +249,7 @@ static void exec_shared_gtt(int i915, unsigned int ring) gem_write(i915, batch, 0, cs, sizeof(cs)); obj.handle = batch; - obj.offset += 8192; /* make sure we don't cause an eviction! */ + obj.offset += stride; /* make sure we don't cause an eviction! */ execbuf.rsvd1 = clone; if (gen > 3 && gen < 6) execbuf.flags |= I915_EXEC_SECURE; -- 2.21.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2019-11-04 17:13 UTC|newest] Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-11-04 17:13 [PATCH i-g-t v5 0/4] Calculate softpin offsets from minimum GTT alignment Janusz Krzysztofik 2019-11-04 17:13 ` [igt-dev] " Janusz Krzysztofik 2019-11-04 17:13 ` [Intel-gfx] " Janusz Krzysztofik 2019-11-04 17:13 ` [PATCH i-g-t v5 1/4] lib/i915: Add minimum GTT alignment helper Janusz Krzysztofik 2019-11-04 17:13 ` [igt-dev] " Janusz Krzysztofik 2019-11-04 17:13 ` [Intel-gfx] " Janusz Krzysztofik 2019-11-05 9:14 ` [igt-dev] " Joonas Lahtinen 2019-11-05 9:14 ` [Intel-gfx] " Joonas Lahtinen 2019-11-06 8:18 ` Chris Wilson 2019-11-06 8:18 ` [igt-dev] [Intel-gfx] " Chris Wilson 2019-11-06 8:18 ` [Intel-gfx] [igt-dev] " Chris Wilson 2019-11-08 16:51 ` Janusz Krzysztofik 2019-11-08 16:51 ` Janusz Krzysztofik 2019-11-08 16:51 ` [Intel-gfx] " Janusz Krzysztofik 2019-11-04 17:13 ` [PATCH i-g-t v5 2/4] tests/gem_exec_reloc: Don't filter out invalid addresses Janusz Krzysztofik 2019-11-04 17:13 ` [igt-dev] " Janusz Krzysztofik 2019-11-04 17:13 ` [Intel-gfx] " Janusz Krzysztofik 2019-11-04 20:46 ` Vanshidhar Konda 2019-11-04 20:46 ` [igt-dev] " Vanshidhar Konda 2019-11-04 20:46 ` [Intel-gfx] " Vanshidhar Konda 2019-11-05 15:49 ` Janusz Krzysztofik 2019-11-05 15:49 ` [igt-dev] " Janusz Krzysztofik 2019-11-05 15:49 ` [Intel-gfx] " Janusz Krzysztofik 2019-11-04 17:13 ` [PATCH i-g-t v5 3/4] tests/gem_exec_reloc: Calculate offsets from minimum GTT alignment Janusz Krzysztofik 2019-11-04 17:13 ` [igt-dev] " Janusz Krzysztofik 2019-11-04 17:13 ` [Intel-gfx] " Janusz Krzysztofik 2019-11-04 20:48 ` Vanshidhar Konda 2019-11-04 20:48 ` [igt-dev] " Vanshidhar Konda 2019-11-04 20:48 ` [Intel-gfx] " Vanshidhar Konda 2019-11-04 17:13 ` Janusz Krzysztofik [this message] 2019-11-04 17:13 ` [Intel-gfx] [PATCH i-g-t v5 4/4] tests/gem_ctx_shared: Align objects using " Janusz Krzysztofik 2019-11-04 20:49 ` Vanshidhar Konda 2019-11-04 20:49 ` [Intel-gfx] " Vanshidhar Konda 2019-11-04 19:13 ` [igt-dev] ✓ Fi.CI.BAT: success for Calculate softpin offsets from minimum GTT alignment (rev2) Patchwork 2019-11-05 4:23 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
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