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From: Christophe Roullier <christophe.roullier@st.com>
To: <robh@kernel.org>, <davem@davemloft.net>, <joabreu@synopsys.com>,
	<mark.rutland@arm.com>, <mcoquelin.stm32@gmail.com>,
	<alexandre.torgue@st.com>, <peppe.cavallaro@st.com>
Cc: <linux-stm32@st-md-mailman.stormreply.com>,
	<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>, <netdev@vger.kernel.org>,
	<christophe.roullier@st.com>, <andrew@lunn.ch>
Subject: [PATCH V2 net-next 3/4] ARM: dts: stm32: adjust slew rate for Ethernet
Date: Tue, 5 Nov 2019 13:45:04 +0100	[thread overview]
Message-ID: <20191105124505.4738-4-christophe.roullier@st.com> (raw)
In-Reply-To: <20191105124505.4738-1-christophe.roullier@st.com>

ETH_MDIO slew-rate should be set to "0" instead of "2"

Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
---
 arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
index 0a3a7d66737b..9a8f0d4c9ea3 100644
--- a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
@@ -217,13 +217,18 @@
 						 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
 						 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
 						 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
-						 <STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */
 						 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
 					bias-disable;
 					drive-push-pull;
-					slew-rate = <3>;
+					slew-rate = <2>;
 				};
 				pins2 {
+					pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
+					bias-disable;
+					drive-push-pull;
+					slew-rate = <0>;
+				};
+				pins3 {
 					pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
 						 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
 						 <STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */
-- 
2.17.1


WARNING: multiple messages have this Message-ID (diff)
From: Christophe Roullier <christophe.roullier@st.com>
To: <robh@kernel.org>, <davem@davemloft.net>, <joabreu@synopsys.com>,
	<mark.rutland@arm.com>, <mcoquelin.stm32@gmail.com>,
	<alexandre.torgue@st.com>, <peppe.cavallaro@st.com>
Cc: devicetree@vger.kernel.org, andrew@lunn.ch,
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-stm32@st-md-mailman.stormreply.com,
	christophe.roullier@st.com, linux-arm-kernel@lists.infradead.org
Subject: [PATCH V2 net-next 3/4] ARM: dts: stm32: adjust slew rate for Ethernet
Date: Tue, 5 Nov 2019 13:45:04 +0100	[thread overview]
Message-ID: <20191105124505.4738-4-christophe.roullier@st.com> (raw)
In-Reply-To: <20191105124505.4738-1-christophe.roullier@st.com>

ETH_MDIO slew-rate should be set to "0" instead of "2"

Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
---
 arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
index 0a3a7d66737b..9a8f0d4c9ea3 100644
--- a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
@@ -217,13 +217,18 @@
 						 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
 						 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
 						 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
-						 <STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */
 						 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
 					bias-disable;
 					drive-push-pull;
-					slew-rate = <3>;
+					slew-rate = <2>;
 				};
 				pins2 {
+					pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
+					bias-disable;
+					drive-push-pull;
+					slew-rate = <0>;
+				};
+				pins3 {
 					pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
 						 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
 						 <STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */
-- 
2.17.1


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  parent reply	other threads:[~2019-11-05 12:45 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-05 12:45 [PATCH V2 net-next 0/4] net: ethernet: stmmac: cleanup clock and optimization Christophe Roullier
2019-11-05 12:45 ` Christophe Roullier
2019-11-05 12:45 ` [PATCH V2 net-next 1/4] net: ethernet: stmmac: Add support for syscfg clock Christophe Roullier
2019-11-05 12:45   ` Christophe Roullier
2019-11-05 17:47   ` Andrew Lunn
2019-11-05 17:47     ` Andrew Lunn
2019-11-05 12:45 ` [PATCH V2 net-next 2/4] ARM: dts: stm32: remove syscfg clock on stm32mp157c ethernet Christophe Roullier
2019-11-05 12:45   ` Christophe Roullier
2019-11-05 12:45 ` Christophe Roullier [this message]
2019-11-05 12:45   ` [PATCH V2 net-next 3/4] ARM: dts: stm32: adjust slew rate for Ethernet Christophe Roullier
2019-11-05 12:45 ` [PATCH V2 net-next 4/4] ARM: dts: stm32: Enable gating of the MAC TX clock during TX low-power mode on stm32mp157c Christophe Roullier
2019-11-05 12:45   ` Christophe Roullier

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