From: Chris Wilson <chris@chris-wilson.co.uk> To: intel-gfx@lists.freedesktop.org Subject: [PATCH 24/28] drm/i915/gt: Expose preempt reset timeout via sysfs Date: Thu, 7 Nov 2019 08:12:48 +0000 [thread overview] Message-ID: <20191107081252.10542-24-chris@chris-wilson.co.uk> (raw) In-Reply-To: <20191107081252.10542-1-chris@chris-wilson.co.uk> After initialising a preemption request, we give the current resident a small amount of time to vacate the GPU. The preemption request is for a higher priority context and should be immediate to maintain high quality of service (and avoid priority inversion). However, the preemption granularity of the GPU can be quite coarse and so we need a compromise. The preempt timeout can be adjusted per-engine using, /sys/class/drm/card?/engine/*/preempt_timeout_ms and can be disabled by setting it to 0. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/Kconfig.profile | 3 ++ drivers/gpu/drm/i915/gt/intel_engine_sysfs.c | 48 ++++++++++++++++++++ drivers/gpu/drm/i915/gt/intel_lrc.c | 2 +- 3 files changed, 52 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/Kconfig.profile b/drivers/gpu/drm/i915/Kconfig.profile index 76145d25ce65..066ea9ba2756 100644 --- a/drivers/gpu/drm/i915/Kconfig.profile +++ b/drivers/gpu/drm/i915/Kconfig.profile @@ -33,6 +33,9 @@ config DRM_I915_PREEMPT_TIMEOUT expires, the HW will be reset to allow the more important context to execute. + This is adjustable via + /sys/class/drm/card?/engine/*/preempt_timeout_ms + May be 0 to disable the timeout. config DRM_I915_SPIN_REQUEST diff --git a/drivers/gpu/drm/i915/gt/intel_engine_sysfs.c b/drivers/gpu/drm/i915/gt/intel_engine_sysfs.c index 86377a4ffe70..25012297aa9e 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_sysfs.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_sysfs.c @@ -223,6 +223,50 @@ stop_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) static struct kobj_attribute stop_timeout_attr = __ATTR(stop_timeout_ms, 0644, stop_show, stop_store); +static ssize_t +preempt_timeout_store(struct kobject *kobj, struct kobj_attribute *attr, + const char *buf, size_t count) +{ + struct intel_engine_cs *engine = kobj_to_engine(kobj); + unsigned long long timeout; + int err; + + /* + * After initialising a preemption request, we give the current + * resident a small amount of time to vacate the GPU. The preemption + * request is for a higher priority context and should be immediate to + * maintain high quality of service (and avoid priority inversion). + * However, the preemption granularity of the GPU can be quite coarse + * and so we need a compromise. + */ + + err = kstrtoull(buf, 0, &timeout); + if (err) + return err; + + if (timeout > jiffies_to_msecs(MAX_SCHEDULE_TIMEOUT)) + return -EINVAL; + + WRITE_ONCE(engine->props.preempt_timeout_ms, timeout); + + if (READ_ONCE(engine->execlists.pending[0])) + set_timer_ms(&engine->execlists.preempt, timeout); + + return count; +} + +static ssize_t +preempt_timeout_show(struct kobject *kobj, struct kobj_attribute *attr, + char *buf) +{ + struct intel_engine_cs *engine = kobj_to_engine(kobj); + + return sprintf(buf, "%lu\n", engine->props.preempt_timeout_ms); +} + +static struct kobj_attribute preempt_timeout_attr = +__ATTR(preempt_timeout_ms, 0644, preempt_timeout_show, preempt_timeout_store); + static void kobj_engine_release(struct kobject *kobj) { kfree(kobj); @@ -292,6 +336,10 @@ void intel_engines_add_sysfs(struct drm_i915_private *i915) sysfs_create_file(kobj, ×lice_duration_attr.attr)) goto err_engine; + if (intel_engine_has_preempt_reset(engine) && + sysfs_create_file(kobj, &preempt_timeout_attr.attr)) + goto err_engine; + if (0) { err_object: kobject_put(kobj); diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c index 54a6debd6bdb..6688fbfd49b7 100644 --- a/drivers/gpu/drm/i915/gt/intel_lrc.c +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c @@ -2222,7 +2222,7 @@ static noinline void preempt_reset(struct intel_engine_cs *engine) const unsigned int bit = I915_RESET_ENGINE + engine->id; unsigned long *lock = &engine->gt->reset.flags; - if (i915_modparams.reset < 3) + if (!intel_has_reset_engine(engine->gt)) return; if (test_and_set_bit(bit, lock)) -- 2.24.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: Chris Wilson <chris@chris-wilson.co.uk> To: intel-gfx@lists.freedesktop.org Subject: [Intel-gfx] [PATCH 24/28] drm/i915/gt: Expose preempt reset timeout via sysfs Date: Thu, 7 Nov 2019 08:12:48 +0000 [thread overview] Message-ID: <20191107081252.10542-24-chris@chris-wilson.co.uk> (raw) Message-ID: <20191107081248.QHbz0LrBrbYvjl1D9Z6MWhaPuwrEfAvBt6kbj-Z6JFg@z> (raw) In-Reply-To: <20191107081252.10542-1-chris@chris-wilson.co.uk> After initialising a preemption request, we give the current resident a small amount of time to vacate the GPU. The preemption request is for a higher priority context and should be immediate to maintain high quality of service (and avoid priority inversion). However, the preemption granularity of the GPU can be quite coarse and so we need a compromise. The preempt timeout can be adjusted per-engine using, /sys/class/drm/card?/engine/*/preempt_timeout_ms and can be disabled by setting it to 0. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/Kconfig.profile | 3 ++ drivers/gpu/drm/i915/gt/intel_engine_sysfs.c | 48 ++++++++++++++++++++ drivers/gpu/drm/i915/gt/intel_lrc.c | 2 +- 3 files changed, 52 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/Kconfig.profile b/drivers/gpu/drm/i915/Kconfig.profile index 76145d25ce65..066ea9ba2756 100644 --- a/drivers/gpu/drm/i915/Kconfig.profile +++ b/drivers/gpu/drm/i915/Kconfig.profile @@ -33,6 +33,9 @@ config DRM_I915_PREEMPT_TIMEOUT expires, the HW will be reset to allow the more important context to execute. + This is adjustable via + /sys/class/drm/card?/engine/*/preempt_timeout_ms + May be 0 to disable the timeout. config DRM_I915_SPIN_REQUEST diff --git a/drivers/gpu/drm/i915/gt/intel_engine_sysfs.c b/drivers/gpu/drm/i915/gt/intel_engine_sysfs.c index 86377a4ffe70..25012297aa9e 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_sysfs.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_sysfs.c @@ -223,6 +223,50 @@ stop_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) static struct kobj_attribute stop_timeout_attr = __ATTR(stop_timeout_ms, 0644, stop_show, stop_store); +static ssize_t +preempt_timeout_store(struct kobject *kobj, struct kobj_attribute *attr, + const char *buf, size_t count) +{ + struct intel_engine_cs *engine = kobj_to_engine(kobj); + unsigned long long timeout; + int err; + + /* + * After initialising a preemption request, we give the current + * resident a small amount of time to vacate the GPU. The preemption + * request is for a higher priority context and should be immediate to + * maintain high quality of service (and avoid priority inversion). + * However, the preemption granularity of the GPU can be quite coarse + * and so we need a compromise. + */ + + err = kstrtoull(buf, 0, &timeout); + if (err) + return err; + + if (timeout > jiffies_to_msecs(MAX_SCHEDULE_TIMEOUT)) + return -EINVAL; + + WRITE_ONCE(engine->props.preempt_timeout_ms, timeout); + + if (READ_ONCE(engine->execlists.pending[0])) + set_timer_ms(&engine->execlists.preempt, timeout); + + return count; +} + +static ssize_t +preempt_timeout_show(struct kobject *kobj, struct kobj_attribute *attr, + char *buf) +{ + struct intel_engine_cs *engine = kobj_to_engine(kobj); + + return sprintf(buf, "%lu\n", engine->props.preempt_timeout_ms); +} + +static struct kobj_attribute preempt_timeout_attr = +__ATTR(preempt_timeout_ms, 0644, preempt_timeout_show, preempt_timeout_store); + static void kobj_engine_release(struct kobject *kobj) { kfree(kobj); @@ -292,6 +336,10 @@ void intel_engines_add_sysfs(struct drm_i915_private *i915) sysfs_create_file(kobj, ×lice_duration_attr.attr)) goto err_engine; + if (intel_engine_has_preempt_reset(engine) && + sysfs_create_file(kobj, &preempt_timeout_attr.attr)) + goto err_engine; + if (0) { err_object: kobject_put(kobj); diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c index 54a6debd6bdb..6688fbfd49b7 100644 --- a/drivers/gpu/drm/i915/gt/intel_lrc.c +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c @@ -2222,7 +2222,7 @@ static noinline void preempt_reset(struct intel_engine_cs *engine) const unsigned int bit = I915_RESET_ENGINE + engine->id; unsigned long *lock = &engine->gt->reset.flags; - if (i915_modparams.reset < 3) + if (!intel_has_reset_engine(engine->gt)) return; if (test_and_set_bit(bit, lock)) -- 2.24.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2019-11-07 8:13 UTC|newest] Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-11-07 8:12 [PATCH 01/28] drm/i915: Leave the aliasing-ppgtt size alone Chris Wilson 2019-11-07 8:12 ` [Intel-gfx] " Chris Wilson 2019-11-07 8:12 ` [PATCH 02/28] drm: Move EXPORT_SYMBOL_FOR_TESTS_ONLY under a separate Kconfig Chris Wilson 2019-11-07 8:12 ` [Intel-gfx] " Chris Wilson 2019-11-07 8:12 ` [PATCH 03/28] drm: Expose a method for creating anonymous struct file around drm_minor Chris Wilson 2019-11-07 8:12 ` [Intel-gfx] " Chris Wilson 2019-11-07 8:12 ` [PATCH 04/28] drm/i915/selftests: Replace mock_file hackery with drm's true fake Chris Wilson 2019-11-07 8:12 ` [Intel-gfx] " Chris Wilson 2019-11-07 8:12 ` [PATCH 05/28] drm/i915/selftests: Wrap vm_mmap() around GEM objects Chris Wilson 2019-11-07 8:12 ` [Intel-gfx] " Chris Wilson 2019-11-07 8:12 ` [PATCH 06/28] drm/i915/selftests: Verify mmap_gtt revocation on unbinding Chris Wilson 2019-11-07 8:12 ` [Intel-gfx] " Chris Wilson 2019-11-07 8:12 ` [PATCH 07/28] drm/i915/userptr: Try to acquire the page lock around set_page_dirty() Chris Wilson 2019-11-07 8:12 ` [Intel-gfx] " Chris Wilson 2019-11-07 8:12 ` [PATCH 08/28] drm/i915/gem: Safely acquire the ctx->vm when copying Chris Wilson 2019-11-07 8:12 ` [Intel-gfx] " Chris Wilson 2019-11-07 8:12 ` [PATCH 09/28] drm/i915/selftests: Exercise parallel blit operations on a single ctx Chris Wilson 2019-11-07 8:12 ` [Intel-gfx] " Chris Wilson 2019-11-07 8:12 ` [PATCH 10/28] drm/i915/selftests: Perform some basic cycle counting of MI ops Chris Wilson 2019-11-07 8:12 ` [Intel-gfx] " Chris Wilson 2019-11-07 8:39 ` Mika Kuoppala 2019-11-07 8:39 ` [Intel-gfx] " Mika Kuoppala 2019-11-07 8:47 ` Chris Wilson 2019-11-07 8:47 ` [Intel-gfx] " Chris Wilson 2019-11-07 8:12 ` [PATCH 11/28] drm/i915/selftests: Mock the engine sorting for easy validation Chris Wilson 2019-11-07 8:12 ` [Intel-gfx] " Chris Wilson 2019-11-07 8:12 ` [PATCH 12/28] drm/i915: Use a ctor for TYPESAFE_BY_RCU i915_request Chris Wilson 2019-11-07 8:12 ` [Intel-gfx] " Chris Wilson 2019-11-07 8:12 ` [PATCH 13/28] drm/i915: Drop GEM context as a direct link from i915_request Chris Wilson 2019-11-07 8:12 ` [Intel-gfx] " Chris Wilson 2019-11-07 8:12 ` [PATCH 14/28] drm/i915: Push the use-semaphore marker onto the intel_context Chris Wilson 2019-11-07 8:12 ` [Intel-gfx] " Chris Wilson 2019-11-07 8:12 ` [PATCH 15/28] drm/i915: Remove i915->kernel_context Chris Wilson 2019-11-07 8:12 ` [Intel-gfx] " Chris Wilson 2019-11-07 8:12 ` [PATCH 16/28] drm/i915: Move i915_gem_init_contexts() earlier Chris Wilson 2019-11-07 8:12 ` [Intel-gfx] " Chris Wilson 2019-11-07 8:12 ` [PATCH 17/28] drm/i915/gt: Defer engine registration until fully initialised Chris Wilson 2019-11-07 8:12 ` [Intel-gfx] " Chris Wilson 2019-11-07 12:22 ` Mika Kuoppala 2019-11-07 12:22 ` [Intel-gfx] " Mika Kuoppala 2019-11-07 8:12 ` [PATCH 18/28] drm/i915/gt: Pull GT initialisation under intel_gt_init() Chris Wilson 2019-11-07 8:12 ` [Intel-gfx] " Chris Wilson 2019-11-07 8:12 ` [PATCH 19/28] drm/i915/gt: Merge engine init/setup loops Chris Wilson 2019-11-07 8:12 ` [Intel-gfx] " Chris Wilson 2019-11-07 8:12 ` [PATCH 20/28] drm/i915/gt: Expose engine properties via sysfs Chris Wilson 2019-11-07 8:12 ` [Intel-gfx] " Chris Wilson 2019-11-07 8:12 ` [PATCH 21/28] drm/i915/gt: Expose engine->mmio_base " Chris Wilson 2019-11-07 8:12 ` [Intel-gfx] " Chris Wilson 2019-11-07 8:12 ` [PATCH 22/28] drm/i915/gt: Expose timeslice duration to sysfs Chris Wilson 2019-11-07 8:12 ` [Intel-gfx] " Chris Wilson 2019-11-07 8:12 ` [PATCH 23/28] drm/i915/gt: Expose reset stop timeout via sysfs Chris Wilson 2019-11-07 8:12 ` [Intel-gfx] " Chris Wilson 2019-11-07 8:12 ` Chris Wilson [this message] 2019-11-07 8:12 ` [Intel-gfx] [PATCH 24/28] drm/i915/gt: Expose preempt reset " Chris Wilson 2019-11-07 8:12 ` [PATCH 25/28] drm/i915/gt: Expose heartbeat interval " Chris Wilson 2019-11-07 8:12 ` [Intel-gfx] " Chris Wilson 2019-11-07 8:12 ` [PATCH 26/28] drm/i915: Flush idle barriers when waiting Chris Wilson 2019-11-07 8:12 ` [Intel-gfx] " Chris Wilson 2019-11-07 8:12 ` [PATCH 27/28] drm/i915: Allow userspace to specify ringsize on construction Chris Wilson 2019-11-07 8:12 ` [Intel-gfx] " Chris Wilson 2019-11-07 8:12 ` [PATCH 28/28] drm/i915/gem: Honour O_NONBLOCK before throttling execbuf submissions Chris Wilson 2019-11-07 8:12 ` [Intel-gfx] " Chris Wilson 2019-11-07 11:18 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/28] drm/i915: Leave the aliasing-ppgtt size alone Patchwork 2019-11-07 11:18 ` [Intel-gfx] " Patchwork 2019-11-07 11:30 ` ✗ Fi.CI.SPARSE: " Patchwork 2019-11-07 11:30 ` [Intel-gfx] " Patchwork 2019-11-07 11:39 ` ✗ Fi.CI.BAT: failure " Patchwork 2019-11-07 11:39 ` [Intel-gfx] " Patchwork
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