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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Subject: [CI 1/2] drm/i915/pmu: Cheat when reading the actual frequency to avoid fw
Date: Fri,  8 Nov 2019 10:35:10 +0000	[thread overview]
Message-ID: <20191108103511.20951-1-chris@chris-wilson.co.uk> (raw)

We want to avoid taking forcewake when querying the performance stats,
as we wish to avoid perturbing the system under observation. (And with
the forcewake being kept alive for 1ms after use, sampling the frequency
from a timer keeps forcewake 60% active.)

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/i915_pmu.c | 17 +++++++++++++++--
 1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 05395015d1f2..8e74f40413b8 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -366,8 +366,21 @@ frequency_sample(struct intel_gt *gt, unsigned int period_ns)
 
 		val = rps->cur_freq;
 		if (intel_gt_pm_get_if_awake(gt)) {
-			val = intel_uncore_read_notrace(uncore, GEN6_RPSTAT1);
-			val = intel_get_cagf(rps, val);
+			u32 stat;
+
+			/*
+			 * We take a quick peek here without using forcewake
+			 * so that we don't perturb the system under observation
+			 * (forcewake => !rc6 => increased power use). We expect
+			 * that if the read fails because it is outside of the
+			 * mmio power well, then it will return 0 -- in which
+			 * case we assume the system is running at the intended
+			 * frequency. Fortunately, the read should rarely fail!
+			 */
+			stat = intel_uncore_read_fw(uncore, GEN6_RPSTAT1);
+			if (stat)
+				val = intel_get_cagf(rps, stat);
+
 			intel_gt_pm_put(gt);
 		}
 
-- 
2.24.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [CI 1/2] drm/i915/pmu: Cheat when reading the actual frequency to avoid fw
Date: Fri,  8 Nov 2019 10:35:10 +0000	[thread overview]
Message-ID: <20191108103511.20951-1-chris@chris-wilson.co.uk> (raw)
Message-ID: <20191108103510.fcj9CC5_zh_hvBfaZ_X_rGzPe8i5Osz94fbiPyYQH60@z> (raw)

We want to avoid taking forcewake when querying the performance stats,
as we wish to avoid perturbing the system under observation. (And with
the forcewake being kept alive for 1ms after use, sampling the frequency
from a timer keeps forcewake 60% active.)

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/i915_pmu.c | 17 +++++++++++++++--
 1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 05395015d1f2..8e74f40413b8 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -366,8 +366,21 @@ frequency_sample(struct intel_gt *gt, unsigned int period_ns)
 
 		val = rps->cur_freq;
 		if (intel_gt_pm_get_if_awake(gt)) {
-			val = intel_uncore_read_notrace(uncore, GEN6_RPSTAT1);
-			val = intel_get_cagf(rps, val);
+			u32 stat;
+
+			/*
+			 * We take a quick peek here without using forcewake
+			 * so that we don't perturb the system under observation
+			 * (forcewake => !rc6 => increased power use). We expect
+			 * that if the read fails because it is outside of the
+			 * mmio power well, then it will return 0 -- in which
+			 * case we assume the system is running at the intended
+			 * frequency. Fortunately, the read should rarely fail!
+			 */
+			stat = intel_uncore_read_fw(uncore, GEN6_RPSTAT1);
+			if (stat)
+				val = intel_get_cagf(rps, stat);
+
 			intel_gt_pm_put(gt);
 		}
 
-- 
2.24.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

             reply	other threads:[~2019-11-08 10:35 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-08 10:35 Chris Wilson [this message]
2019-11-08 10:35 ` [Intel-gfx] [CI 1/2] drm/i915/pmu: Cheat when reading the actual frequency to avoid fw Chris Wilson
2019-11-08 10:35 ` [CI 2/2] drm/i915/pmu: Only use exclusive mmio access for gen7 Chris Wilson
2019-11-08 10:35   ` [Intel-gfx] " Chris Wilson
2019-11-08 10:55 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] drm/i915/pmu: Cheat when reading the actual frequency to avoid fw Patchwork
2019-11-08 10:55   ` [Intel-gfx] " Patchwork
2019-11-08 10:56 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-11-08 10:56   ` [Intel-gfx] " Patchwork
2019-11-08 11:24 ` ✓ Fi.CI.BAT: success " Patchwork
2019-11-08 11:24   ` [Intel-gfx] " Patchwork
2019-11-09 22:20 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-11-09 22:20   ` [Intel-gfx] " Patchwork

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