[PATCH/RFC] ARM: boot: Relax kernel image alignment for RZ/A with CS3 SDRAM

[Geert Uytterhoeven <geert+renesas@glider.be>]

The RZA2MEVB sub board has 64 MiB of SDRAM at 0x0C000000 (CS3 space).
Hence the mask for CONFIG_AUTO_ZRELADDR needs to be changed, otherwise
the system will crash because it will try to decompress a zImage or
uImage to a non-RAM garbage address.

Based on a patch in the BSP by Chris Brandt <chris.brandt@renesas.com>.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
No idea what to do with the rest of the comment, or if this breaks
existing platforms.

Thanks for your comments!
---
 arch/arm/boot/compressed/head.S | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 93dffed0ac6e02b4..cfee6bd1e7a0a582 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -231,10 +231,10 @@ not_angel:
 		 * address.
 		 *
 		 * This alignment is a balance between the requirements of
-		 * different platforms - we have chosen 128MB to allow
+		 * different platforms - we have chosen 64MB to allow
 		 * platforms which align the start of their physical memory
-		 * to 128MB to use this feature, while allowing the zImage
-		 * to be placed within the first 128MB of memory on other
+		 * to 64MB to use this feature, while allowing the zImage
+		 * to be placed within the first 64MB of memory on other
 		 * platforms.  Increasing the alignment means we place
 		 * stricter alignment requirements on the start of physical
 		 * memory, but relaxing it means that we break people who
@@ -242,7 +242,7 @@ not_angel:
 		 * of this range.
 		 */
 		mov	r4, pc
-		and	r4, r4, #0xf8000000
+		and	r4, r4, #0xfc000000
 		/* Determine final kernel image address. */
 		add	r4, r4, #TEXT_OFFSET
 #else
-- 
2.17.1