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From: clinton.a.taylor@intel.com
To: Intel-gfx@lists.freedesktop.org
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Subject: [PATCH] drm/i915: Disable display interrupts during SDE IRQ handler
Date: Wed, 20 Nov 2019 15:40:20 -0800	[thread overview]
Message-ID: <20191120234020.29887-1-clinton.a.taylor@intel.com> (raw)

From: Clint Taylor <clinton.a.taylor@intel.com>

During the Display Interrupt Service routine the Display Interrupt
Enable bit must be disabled, The interrupts handled, then the
Display Interrupt Enable bit must be set to prevent possible missed
interrupts.

Bspec: 49212
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Aditya Swarup <aditya.swarup@intel.com>
Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index dae00f7dd7df..43434273a08a 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2484,7 +2484,11 @@ __gen11_irq_handler(struct drm_i915_private * const i915,
 		 * GEN11_DISPLAY_INT_CTL has same format as GEN8_MASTER_IRQ
 		 * for the display related bits.
 		 */
+		raw_reg_write(regs, GEN11_DISPLAY_INT_CTL, 0x0);
 		gen8_de_irq_handler(i915, disp_ctl);
+		raw_reg_write(regs, GEN11_DISPLAY_INT_CTL,
+					  GEN11_DISPLAY_IRQ_ENABLE);
+
 		enable_rpm_wakeref_asserts(&i915->runtime_pm);
 	}
 
-- 
2.19.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: clinton.a.taylor@intel.com
To: Intel-gfx@lists.freedesktop.org
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Subject: [Intel-gfx] [PATCH] drm/i915: Disable display interrupts during SDE IRQ handler
Date: Wed, 20 Nov 2019 15:40:20 -0800	[thread overview]
Message-ID: <20191120234020.29887-1-clinton.a.taylor@intel.com> (raw)
Message-ID: <20191120234020.W7jZcEwq4ZhQzK8jESr9NtSQDZjK4nRrFg9kX2LMz1g@z> (raw)

From: Clint Taylor <clinton.a.taylor@intel.com>

During the Display Interrupt Service routine the Display Interrupt
Enable bit must be disabled, The interrupts handled, then the
Display Interrupt Enable bit must be set to prevent possible missed
interrupts.

Bspec: 49212
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Aditya Swarup <aditya.swarup@intel.com>
Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index dae00f7dd7df..43434273a08a 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2484,7 +2484,11 @@ __gen11_irq_handler(struct drm_i915_private * const i915,
 		 * GEN11_DISPLAY_INT_CTL has same format as GEN8_MASTER_IRQ
 		 * for the display related bits.
 		 */
+		raw_reg_write(regs, GEN11_DISPLAY_INT_CTL, 0x0);
 		gen8_de_irq_handler(i915, disp_ctl);
+		raw_reg_write(regs, GEN11_DISPLAY_INT_CTL,
+					  GEN11_DISPLAY_IRQ_ENABLE);
+
 		enable_rpm_wakeref_asserts(&i915->runtime_pm);
 	}
 
-- 
2.19.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

             reply	other threads:[~2019-11-20 23:40 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-20 23:40 clinton.a.taylor [this message]
2019-11-20 23:40 ` [Intel-gfx] [PATCH] drm/i915: Disable display interrupts during SDE IRQ handler clinton.a.taylor
2019-11-21  1:34 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2019-11-21  1:34   ` [Intel-gfx] " Patchwork
2019-11-21  1:55 ` ✓ Fi.CI.BAT: success " Patchwork
2019-11-21  1:55   ` [Intel-gfx] " Patchwork
2019-11-21 16:56 ` [PATCH] " Matt Roper
2019-11-21 16:56   ` [Intel-gfx] " Matt Roper
2019-11-21 17:40 ` [PATCH] drm/i915: Disable display interrupts during display " clinton.a.taylor
2019-11-21 17:40   ` [Intel-gfx] " clinton.a.taylor
2019-11-21 18:11 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Disable display interrupts during SDE IRQ handler (rev2) Patchwork
2019-11-21 18:11   ` [Intel-gfx] " Patchwork
2019-11-21 18:42 ` ✓ Fi.CI.BAT: success " Patchwork
2019-11-21 18:42   ` [Intel-gfx] " Patchwork
2019-11-21 20:14 ` [PATCH v3] drm/i915: Disable display interrupts during display IRQ handler clinton.a.taylor
2019-11-21 20:14   ` [Intel-gfx] " clinton.a.taylor
2019-11-27  1:01   ` Lucas De Marchi
2019-11-27  1:01     ` [Intel-gfx] " Lucas De Marchi
2019-11-21 21:04 ` ✓ Fi.CI.BAT: success for drm/i915: Disable display interrupts during SDE IRQ handler (rev3) Patchwork
2019-11-21 21:04   ` [Intel-gfx] " Patchwork
2019-11-22  2:02 ` ✓ Fi.CI.IGT: success for drm/i915: Disable display interrupts during SDE IRQ handler Patchwork
2019-11-22  2:02   ` [Intel-gfx] " Patchwork

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