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From: Daniel Drake <drake@endlessm.com>
To: bhelgaas@google.com
Cc: linux-pci@vger.kernel.org, rafael.j.wysocki@intel.com,
	linux@endlessm.com, linux-pm@vger.kernel.org,
	linux-usb@vger.kernel.org, mika.westerberg@linux.intel.com
Subject: [PATCH v2 2/2] PCI: increase D3 delay for AMD Ryzen5/7 XHCI controllers
Date: Wed, 27 Nov 2019 13:38:36 +0800	[thread overview]
Message-ID: <20191127053836.31624-2-drake@endlessm.com> (raw)
In-Reply-To: <20191127053836.31624-1-drake@endlessm.com>

On Asus UX434DA (AMD Ryzen7 3700U) and Asus X512DK (AMD Ryzen5 3500U),
the XHCI controller fails to resume from runtime suspend or s2idle,
and USB becomes unusable from that point.

xhci_hcd 0000:03:00.4: Refused to change power state, currently in D3
xhci_hcd 0000:03:00.4: enabling device (0000 -> 0002)
xhci_hcd 0000:03:00.4: WARN: xHC restore state timeout
xhci_hcd 0000:03:00.4: PCI post-resume error -110!
xhci_hcd 0000:03:00.4: HC died; cleaning up

During suspend, a transition to D3cold is attempted, however the affected
platforms do not seem to cut the power to the PCI device when in this
state, so the device stays in D3hot.

Upon resume, the D3hot-to-D0 transition is successful only if the D3 delay
is increased to 20ms. The transition failure does not appear to be
detectable as a CRS condition. Add a PCI quirk to increase the delay on the
affected hardware.

Link: https://bugzilla.kernel.org/show_bug.cgi?id=205587
Link: http://lkml.kernel.org/r/CAD8Lp47Vh69gQjROYG69=waJgL7hs1PwnLonL9+27S_TcRhixA@mail.gmail.com
Signed-off-by: Daniel Drake <drake@endlessm.com>
---
 drivers/pci/quirks.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

v2: split out the creation of quirk_d3hot_delay() into its own patch

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 3b4021e719530..222108f1a602e 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -1889,6 +1889,22 @@ static void quirk_radeon_pm(struct pci_dev *dev)
 }
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x6741, quirk_radeon_pm);
 
+/*
+ * Ryzen5/7 XHCI controllers fail upon resume from runtime suspend or s2idle.
+ * https://bugzilla.kernel.org/show_bug.cgi?id=205587
+ *
+ * The kernel attempts to transition these devices to D3cold, but that seems
+ * to be ineffective on the platforms in question; the PCI device appears to
+ * remain on in D3hot state. The D3hot-to-D0 transition then requires an
+ * extended delay in order to succeed.
+ */
+static void quirk_ryzen_xhci_d3hot(struct pci_dev *dev)
+{
+	quirk_d3hot_delay(dev, 20);
+}
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x15e0, quirk_ryzen_xhci_d3hot);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x15e1, quirk_ryzen_xhci_d3hot);
+
 #ifdef CONFIG_X86_IO_APIC
 static int dmi_disable_ioapicreroute(const struct dmi_system_id *d)
 {
-- 
2.20.1


  reply	other threads:[~2019-11-27  5:38 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-27  5:38 [PATCH v2 1/2] PCI: add generic quirk function for increasing D3hot delay Daniel Drake
2019-11-27  5:38 ` Daniel Drake [this message]
2019-11-27 11:50   ` [PATCH v2 2/2] PCI: increase D3 delay for AMD Ryzen5/7 XHCI controllers Mika Westerberg
2019-11-27 11:50 ` [PATCH v2 1/2] PCI: add generic quirk function for increasing D3hot delay Mika Westerberg
2019-12-12  9:51 ` Daniel Drake
2019-12-13 21:04 ` Bjorn Helgaas

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