From: Ville Syrjala <ville.syrjala@linux.intel.com> To: intel-gfx@lists.freedesktop.org Subject: [PATCH 1/7] drm/i915: Clean up arguments to nv12/scaler w/a funcs Date: Wed, 27 Nov 2019 21:05:50 +0200 [thread overview] Message-ID: <20191127190556.1574-2-ville.syrjala@linux.intel.com> (raw) In-Reply-To: <20191127190556.1574-1-ville.syrjala@linux.intel.com> From: Ville Syrjälä <ville.syrjala@linux.intel.com> Don't pass the redundant dev_priv to needs_nv12_wa() and needs_scalerclk_wa(). Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 26 +++++++++++--------- 1 file changed, 14 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 53dc310a5f6d..d559b7ae1151 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -6037,9 +6037,10 @@ static bool hsw_post_update_enable_ips(const struct intel_crtc_state *old_crtc_s return !old_crtc_state->ips_enabled; } -static bool needs_nv12_wa(struct drm_i915_private *dev_priv, - const struct intel_crtc_state *crtc_state) +static bool needs_nv12_wa(const struct intel_crtc_state *crtc_state) { + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); + if (!crtc_state->nv12_planes) return false; @@ -6050,9 +6051,10 @@ static bool needs_nv12_wa(struct drm_i915_private *dev_priv, return false; } -static bool needs_scalerclk_wa(struct drm_i915_private *dev_priv, - const struct intel_crtc_state *crtc_state) +static bool needs_scalerclk_wa(const struct intel_crtc_state *crtc_state) { + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); + /* Wa_2006604312:icl */ if (crtc_state->scaler_state.scaler_users > 0 && IS_ICELAKE(dev_priv)) return true; @@ -6093,12 +6095,12 @@ static void intel_post_plane_update(struct intel_crtc_state *old_crtc_state) intel_post_enable_primary(&crtc->base, pipe_config); } - if (needs_nv12_wa(dev_priv, old_crtc_state) && - !needs_nv12_wa(dev_priv, pipe_config)) + if (needs_nv12_wa(old_crtc_state) && + !needs_nv12_wa(pipe_config)) skl_wa_827(dev_priv, crtc->pipe, false); - if (needs_scalerclk_wa(dev_priv, old_crtc_state) && - !needs_scalerclk_wa(dev_priv, pipe_config)) + if (needs_scalerclk_wa(old_crtc_state) && + !needs_scalerclk_wa(pipe_config)) icl_wa_scalerclkgating(dev_priv, crtc->pipe, false); } @@ -6135,13 +6137,13 @@ static void intel_pre_plane_update(struct intel_crtc_state *old_crtc_state, } /* Display WA 827 */ - if (!needs_nv12_wa(dev_priv, old_crtc_state) && - needs_nv12_wa(dev_priv, pipe_config)) + if (!needs_nv12_wa(old_crtc_state) && + needs_nv12_wa(pipe_config)) skl_wa_827(dev_priv, crtc->pipe, true); /* Wa_2006604312:icl */ - if (!needs_scalerclk_wa(dev_priv, old_crtc_state) && - needs_scalerclk_wa(dev_priv, pipe_config)) + if (!needs_scalerclk_wa(old_crtc_state) && + needs_scalerclk_wa(pipe_config)) icl_wa_scalerclkgating(dev_priv, crtc->pipe, true); /* -- 2.23.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: Ville Syrjala <ville.syrjala@linux.intel.com> To: intel-gfx@lists.freedesktop.org Subject: [Intel-gfx] [PATCH 1/7] drm/i915: Clean up arguments to nv12/scaler w/a funcs Date: Wed, 27 Nov 2019 21:05:50 +0200 [thread overview] Message-ID: <20191127190556.1574-2-ville.syrjala@linux.intel.com> (raw) Message-ID: <20191127190550.3hJtLU6TVAzeLBhc_OJ2IW_Qhf1a2WRPDpxMXgMzV0o@z> (raw) In-Reply-To: <20191127190556.1574-1-ville.syrjala@linux.intel.com> From: Ville Syrjälä <ville.syrjala@linux.intel.com> Don't pass the redundant dev_priv to needs_nv12_wa() and needs_scalerclk_wa(). Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 26 +++++++++++--------- 1 file changed, 14 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 53dc310a5f6d..d559b7ae1151 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -6037,9 +6037,10 @@ static bool hsw_post_update_enable_ips(const struct intel_crtc_state *old_crtc_s return !old_crtc_state->ips_enabled; } -static bool needs_nv12_wa(struct drm_i915_private *dev_priv, - const struct intel_crtc_state *crtc_state) +static bool needs_nv12_wa(const struct intel_crtc_state *crtc_state) { + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); + if (!crtc_state->nv12_planes) return false; @@ -6050,9 +6051,10 @@ static bool needs_nv12_wa(struct drm_i915_private *dev_priv, return false; } -static bool needs_scalerclk_wa(struct drm_i915_private *dev_priv, - const struct intel_crtc_state *crtc_state) +static bool needs_scalerclk_wa(const struct intel_crtc_state *crtc_state) { + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); + /* Wa_2006604312:icl */ if (crtc_state->scaler_state.scaler_users > 0 && IS_ICELAKE(dev_priv)) return true; @@ -6093,12 +6095,12 @@ static void intel_post_plane_update(struct intel_crtc_state *old_crtc_state) intel_post_enable_primary(&crtc->base, pipe_config); } - if (needs_nv12_wa(dev_priv, old_crtc_state) && - !needs_nv12_wa(dev_priv, pipe_config)) + if (needs_nv12_wa(old_crtc_state) && + !needs_nv12_wa(pipe_config)) skl_wa_827(dev_priv, crtc->pipe, false); - if (needs_scalerclk_wa(dev_priv, old_crtc_state) && - !needs_scalerclk_wa(dev_priv, pipe_config)) + if (needs_scalerclk_wa(old_crtc_state) && + !needs_scalerclk_wa(pipe_config)) icl_wa_scalerclkgating(dev_priv, crtc->pipe, false); } @@ -6135,13 +6137,13 @@ static void intel_pre_plane_update(struct intel_crtc_state *old_crtc_state, } /* Display WA 827 */ - if (!needs_nv12_wa(dev_priv, old_crtc_state) && - needs_nv12_wa(dev_priv, pipe_config)) + if (!needs_nv12_wa(old_crtc_state) && + needs_nv12_wa(pipe_config)) skl_wa_827(dev_priv, crtc->pipe, true); /* Wa_2006604312:icl */ - if (!needs_scalerclk_wa(dev_priv, old_crtc_state) && - needs_scalerclk_wa(dev_priv, pipe_config)) + if (!needs_scalerclk_wa(old_crtc_state) && + needs_scalerclk_wa(pipe_config)) icl_wa_scalerclkgating(dev_priv, crtc->pipe, true); /* -- 2.23.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2019-11-27 19:06 UTC|newest] Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-11-27 19:05 [PATCH 0/7] drm/i915: Cleanups around pre/post plane update Ville Syrjala 2019-11-27 19:05 ` [Intel-gfx] " Ville Syrjala 2019-11-27 19:05 ` Ville Syrjala [this message] 2019-11-27 19:05 ` [Intel-gfx] [PATCH 1/7] drm/i915: Clean up arguments to nv12/scaler w/a funcs Ville Syrjala 2019-11-27 23:06 ` Souza, Jose 2019-11-27 23:06 ` [Intel-gfx] " Souza, Jose 2019-11-27 19:05 ` [PATCH 2/7] drm/i915: Pass dev_priv to ilk_disable_lp_wm() Ville Syrjala 2019-11-27 19:05 ` [Intel-gfx] " Ville Syrjala 2019-11-27 23:06 ` Souza, Jose 2019-11-27 23:06 ` [Intel-gfx] " Souza, Jose 2019-11-27 19:05 ` [PATCH 3/7] drm/i915: s/pipe_config/new_crtc_state/ intel_{pre, post}_plane_update() Ville Syrjala 2019-11-27 19:05 ` [Intel-gfx] " Ville Syrjala 2019-11-27 23:09 ` Souza, Jose 2019-11-27 23:09 ` [Intel-gfx] " Souza, Jose 2019-11-27 23:11 ` Souza, Jose 2019-11-27 23:11 ` [Intel-gfx] " Souza, Jose 2019-11-28 12:00 ` Ville Syrjälä 2019-11-28 12:00 ` [Intel-gfx] " Ville Syrjälä 2019-11-27 19:05 ` [PATCH 4/7] drm/i915: Clean up " Ville Syrjala 2019-11-27 19:05 ` [Intel-gfx] " Ville Syrjala 2019-11-27 23:25 ` Souza, Jose 2019-11-27 23:25 ` [Intel-gfx] " Souza, Jose 2019-11-28 12:02 ` Ville Syrjälä 2019-11-28 12:02 ` [Intel-gfx] " Ville Syrjälä 2019-12-03 21:44 ` Souza, Jose 2019-12-04 14:01 ` Ville Syrjälä 2019-11-27 19:05 ` [PATCH 5/7] drm/i915: Clean up the gen2 "no planes -> underrun" workaround Ville Syrjala 2019-11-27 19:05 ` [Intel-gfx] " Ville Syrjala 2019-11-27 23:44 ` Souza, Jose 2019-11-27 23:44 ` [Intel-gfx] " Souza, Jose 2019-11-27 19:05 ` [PATCH 6/7] drm/i915: Nuke intel_pre_disable_primary_noatomic() Ville Syrjala 2019-11-27 19:05 ` [Intel-gfx] " Ville Syrjala 2019-11-27 23:56 ` Souza, Jose 2019-11-27 23:56 ` [Intel-gfx] " Souza, Jose 2019-11-27 19:05 ` [PATCH 7/7] drm/i915: Make intel_crtc_arm_fifo_underrun() functional on gen2 Ville Syrjala 2019-11-27 19:05 ` [Intel-gfx] " Ville Syrjala 2019-11-27 23:57 ` Souza, Jose 2019-11-27 23:57 ` [Intel-gfx] " Souza, Jose 2019-11-27 22:17 ` ✓ Fi.CI.BAT: success for drm/i915: Cleanups around pre/post plane update Patchwork 2019-11-27 22:17 ` [Intel-gfx] " Patchwork 2019-11-29 2:05 ` ✗ Fi.CI.IGT: failure " Patchwork 2019-11-29 2:05 ` [Intel-gfx] " Patchwork
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20191127190556.1574-2-ville.syrjala@linux.intel.com \ --to=ville.syrjala@linux.intel.com \ --cc=intel-gfx@lists.freedesktop.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.