From: James Tai <james.tai@realtek.com> To: "Andreas Färber" <afaerber@suse.de> Cc: <mark.rutland@arm.com>, <devicetree@vger.kernel.org>, <linux-realtek-soc@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <robh+dt@kernel.org>, <linux-arm-kernel@lists.infradead.org> Subject: [PATCH 2/2] arm64: dts: realtek: Add RTD1319 SoC and Realtek PymParticle EVB Date: Thu, 5 Dec 2019 16:25:55 +0800 [thread overview] Message-ID: <20191205082555.22633-3-james.tai@realtek.com> (raw) In-Reply-To: <20191205082555.22633-1-james.tai@realtek.com> Add Device Trees for Realtek RTD1319 SoC family, RTD1319 SoC and Realtek PymParticle EVB. Signed-off-by: James Tai <james.tai@realtek.com> --- arch/arm64/boot/dts/realtek/Makefile | 2 + .../boot/dts/realtek/rtd1319-pymparticle.dts | 43 ++++++ arch/arm64/boot/dts/realtek/rtd1319.dtsi | 12 ++ arch/arm64/boot/dts/realtek/rtd13xx.dtsi | 137 ++++++++++++++++++ 4 files changed, 194 insertions(+) create mode 100644 arch/arm64/boot/dts/realtek/rtd1319-pymparticle.dts create mode 100644 arch/arm64/boot/dts/realtek/rtd1319.dtsi create mode 100644 arch/arm64/boot/dts/realtek/rtd13xx.dtsi diff --git a/arch/arm64/boot/dts/realtek/Makefile b/arch/arm64/boot/dts/realtek/Makefile index fb5f05978ecc..ab00c272ea9e 100644 --- a/arch/arm64/boot/dts/realtek/Makefile +++ b/arch/arm64/boot/dts/realtek/Makefile @@ -9,3 +9,5 @@ dtb-$(CONFIG_ARCH_REALTEK) += rtd1295-zidoo-x9s.dtb dtb-$(CONFIG_ARCH_REALTEK) += rtd1296-ds418.dtb dtb-$(CONFIG_ARCH_REALTEK) += rtd1619-mjolnir.dtb + +dtb-$(CONFIG_ARCH_REALTEK) += rtd1319-pymparticle.dtb diff --git a/arch/arm64/boot/dts/realtek/rtd1319-pymparticle.dts b/arch/arm64/boot/dts/realtek/rtd1319-pymparticle.dts new file mode 100644 index 000000000000..d8bfe2304b71 --- /dev/null +++ b/arch/arm64/boot/dts/realtek/rtd1319-pymparticle.dts @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +/* + * Copyright (c) 2019 Realtek Semiconductor Corp. + */ + +/dts-v1/; + +#include "rtd1319.dtsi" + +/ { + compatible = "realtek,pymparticle", "realtek,rtd1319"; + model = "Realtek PymParticle EVB"; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x80000000>; + }; + + chosen { + stdout-path = "serial0:460800n8"; + }; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + }; +}; + +/* debug console (J1) */ +&uart0 { + status = "okay"; +}; + +/* M.2 slot (CON8) */ +&uart1 { + status = "disabled"; +}; + +/* GPIO connector (T1) */ +&uart2 { + status = "disabled"; +}; diff --git a/arch/arm64/boot/dts/realtek/rtd1319.dtsi b/arch/arm64/boot/dts/realtek/rtd1319.dtsi new file mode 100644 index 000000000000..1dcee00009cd --- /dev/null +++ b/arch/arm64/boot/dts/realtek/rtd1319.dtsi @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +/* + * Realtek RTD1319 SoC + * + * Copyright (c) 2019 Realtek Semiconductor Corp. + */ + +#include "rtd13xx.dtsi" + +/ { + compatible = "realtek,rtd1319"; +}; diff --git a/arch/arm64/boot/dts/realtek/rtd13xx.dtsi b/arch/arm64/boot/dts/realtek/rtd13xx.dtsi new file mode 100644 index 000000000000..92bf962377f6 --- /dev/null +++ b/arch/arm64/boot/dts/realtek/rtd13xx.dtsi @@ -0,0 +1,137 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +/* + * Realtek RTD13xx SoC family + * + * Copyright (c) 2019 Realtek Semiconductor Corp. + */ + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu1: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x100>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu2: cpu@200 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x200>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu3: cpu@300 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x300>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + l2: l2-cache { + compatible = "cache"; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + }; + + arm_pmu: pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, + <&cpu3>; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + osc27M: osc { + compatible = "fixed-clock"; + clock-frequency = <27000000>; + clock-output-names = "osc27M"; + #clock-cells = <0>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x98000000 0x98000000 0x68000000>; + + rbus: bus@98000000 { + compatible = "simple-bus"; + reg = <0x98000000 0x200000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x98000000 0x200000>; + + uart0: serial0@7800 { + compatible = "snps,dw-apb-uart"; + reg = <0x7800 0x400>; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; + clock-frequency = <432000000>; + status = "disabled"; + }; + + uart1: serial1@1b200 { + compatible = "snps,dw-apb-uart"; + reg = <0x1b200 0x400>; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; + clock-frequency = <432000000>; + status = "disabled"; + }; + + uart2: serial2@1b400 { + compatible = "snps,dw-apb-uart"; + reg = <0x1b400 0x400>; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; + clock-frequency = <432000000>; + status = "disabled"; + }; + }; + + gic: interrupt-controller@ff100000 { + compatible = "arm,gic-v3"; + reg = <0xff100000 0x10000>, + <0xff140000 0xc0000>; + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <3>; + }; + }; +}; -- 2.24.0
WARNING: multiple messages have this Message-ID (diff)
From: James Tai <james.tai@realtek.com> To: "Andreas Färber" <afaerber@suse.de> Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, linux-realtek-soc@lists.infradead.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/2] arm64: dts: realtek: Add RTD1319 SoC and Realtek PymParticle EVB Date: Thu, 5 Dec 2019 16:25:55 +0800 [thread overview] Message-ID: <20191205082555.22633-3-james.tai@realtek.com> (raw) In-Reply-To: <20191205082555.22633-1-james.tai@realtek.com> Add Device Trees for Realtek RTD1319 SoC family, RTD1319 SoC and Realtek PymParticle EVB. Signed-off-by: James Tai <james.tai@realtek.com> --- arch/arm64/boot/dts/realtek/Makefile | 2 + .../boot/dts/realtek/rtd1319-pymparticle.dts | 43 ++++++ arch/arm64/boot/dts/realtek/rtd1319.dtsi | 12 ++ arch/arm64/boot/dts/realtek/rtd13xx.dtsi | 137 ++++++++++++++++++ 4 files changed, 194 insertions(+) create mode 100644 arch/arm64/boot/dts/realtek/rtd1319-pymparticle.dts create mode 100644 arch/arm64/boot/dts/realtek/rtd1319.dtsi create mode 100644 arch/arm64/boot/dts/realtek/rtd13xx.dtsi diff --git a/arch/arm64/boot/dts/realtek/Makefile b/arch/arm64/boot/dts/realtek/Makefile index fb5f05978ecc..ab00c272ea9e 100644 --- a/arch/arm64/boot/dts/realtek/Makefile +++ b/arch/arm64/boot/dts/realtek/Makefile @@ -9,3 +9,5 @@ dtb-$(CONFIG_ARCH_REALTEK) += rtd1295-zidoo-x9s.dtb dtb-$(CONFIG_ARCH_REALTEK) += rtd1296-ds418.dtb dtb-$(CONFIG_ARCH_REALTEK) += rtd1619-mjolnir.dtb + +dtb-$(CONFIG_ARCH_REALTEK) += rtd1319-pymparticle.dtb diff --git a/arch/arm64/boot/dts/realtek/rtd1319-pymparticle.dts b/arch/arm64/boot/dts/realtek/rtd1319-pymparticle.dts new file mode 100644 index 000000000000..d8bfe2304b71 --- /dev/null +++ b/arch/arm64/boot/dts/realtek/rtd1319-pymparticle.dts @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +/* + * Copyright (c) 2019 Realtek Semiconductor Corp. + */ + +/dts-v1/; + +#include "rtd1319.dtsi" + +/ { + compatible = "realtek,pymparticle", "realtek,rtd1319"; + model = "Realtek PymParticle EVB"; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x80000000>; + }; + + chosen { + stdout-path = "serial0:460800n8"; + }; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + }; +}; + +/* debug console (J1) */ +&uart0 { + status = "okay"; +}; + +/* M.2 slot (CON8) */ +&uart1 { + status = "disabled"; +}; + +/* GPIO connector (T1) */ +&uart2 { + status = "disabled"; +}; diff --git a/arch/arm64/boot/dts/realtek/rtd1319.dtsi b/arch/arm64/boot/dts/realtek/rtd1319.dtsi new file mode 100644 index 000000000000..1dcee00009cd --- /dev/null +++ b/arch/arm64/boot/dts/realtek/rtd1319.dtsi @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +/* + * Realtek RTD1319 SoC + * + * Copyright (c) 2019 Realtek Semiconductor Corp. + */ + +#include "rtd13xx.dtsi" + +/ { + compatible = "realtek,rtd1319"; +}; diff --git a/arch/arm64/boot/dts/realtek/rtd13xx.dtsi b/arch/arm64/boot/dts/realtek/rtd13xx.dtsi new file mode 100644 index 000000000000..92bf962377f6 --- /dev/null +++ b/arch/arm64/boot/dts/realtek/rtd13xx.dtsi @@ -0,0 +1,137 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +/* + * Realtek RTD13xx SoC family + * + * Copyright (c) 2019 Realtek Semiconductor Corp. + */ + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu1: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x100>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu2: cpu@200 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x200>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu3: cpu@300 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x300>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + l2: l2-cache { + compatible = "cache"; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + }; + + arm_pmu: pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, + <&cpu3>; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + osc27M: osc { + compatible = "fixed-clock"; + clock-frequency = <27000000>; + clock-output-names = "osc27M"; + #clock-cells = <0>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x98000000 0x98000000 0x68000000>; + + rbus: bus@98000000 { + compatible = "simple-bus"; + reg = <0x98000000 0x200000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x98000000 0x200000>; + + uart0: serial0@7800 { + compatible = "snps,dw-apb-uart"; + reg = <0x7800 0x400>; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; + clock-frequency = <432000000>; + status = "disabled"; + }; + + uart1: serial1@1b200 { + compatible = "snps,dw-apb-uart"; + reg = <0x1b200 0x400>; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; + clock-frequency = <432000000>; + status = "disabled"; + }; + + uart2: serial2@1b400 { + compatible = "snps,dw-apb-uart"; + reg = <0x1b400 0x400>; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; + clock-frequency = <432000000>; + status = "disabled"; + }; + }; + + gic: interrupt-controller@ff100000 { + compatible = "arm,gic-v3"; + reg = <0xff100000 0x10000>, + <0xff140000 0xc0000>; + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <3>; + }; + }; +}; -- 2.24.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-12-05 8:26 UTC|newest] Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-12-05 8:25 [PATCH 0/2] Initial RTD1319 SoC and Realtek PymParticle EVB support James Tai 2019-12-05 8:25 ` James Tai 2019-12-05 8:25 ` [PATCH 1/2] dt-bindings: arm: realtek: Document RTD1319 and Realtek PymParticle EVB James Tai 2019-12-05 8:25 ` James Tai 2019-12-05 8:33 ` Andreas Färber 2019-12-05 8:33 ` Andreas Färber 2019-12-18 23:28 ` Rob Herring 2019-12-18 23:28 ` Rob Herring 2019-12-05 8:25 ` James Tai [this message] 2019-12-05 8:25 ` [PATCH 2/2] arm64: dts: realtek: Add RTD1319 SoC " James Tai 2019-12-05 10:58 ` Andreas Färber 2019-12-05 10:58 ` Andreas Färber 2019-12-05 12:10 ` Robin Murphy 2019-12-05 12:10 ` Robin Murphy 2019-12-27 7:17 ` James Tai 2019-12-27 7:17 ` James Tai
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