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From: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Ben Skeggs <bskeggs-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	nouveau-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
	Joerg Roedel <joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>,
	dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Subject: [PATCH v3 5/9] drm/nouveau: tegra: Avoid pulsing reset twice
Date: Mon,  9 Dec 2019 13:00:01 +0100	[thread overview]
Message-ID: <20191209120005.2254786-6-thierry.reding@gmail.com> (raw)
In-Reply-To: <20191209120005.2254786-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

From: Thierry Reding <treding@nvidia.com>

When the GPU powergate is controlled by a generic power domain provider,
the reset will automatically be asserted and deasserted as part of the
power-ungating procedure.

On some Jetson TX2 boards, doing an additional assert and deassert of
the GPU outside of the power-ungate procedure can cause the GPU to go
into a bad state where the memory interface can no longer access system
memory.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c
index 0e372a190d3f..747a775121cf 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c
@@ -52,18 +52,18 @@ nvkm_device_tegra_power_up(struct nvkm_device_tegra *tdev)
 	clk_set_rate(tdev->clk_pwr, 204000000);
 	udelay(10);
 
-	reset_control_assert(tdev->rst);
-	udelay(10);
-
 	if (!tdev->pdev->dev.pm_domain) {
+		reset_control_assert(tdev->rst);
+		udelay(10);
+
 		ret = tegra_powergate_remove_clamping(TEGRA_POWERGATE_3D);
 		if (ret)
 			goto err_clamp;
 		udelay(10);
-	}
 
-	reset_control_deassert(tdev->rst);
-	udelay(10);
+		reset_control_deassert(tdev->rst);
+		udelay(10);
+	}
 
 	return 0;
 
-- 
2.23.0

_______________________________________________
Nouveau mailing list
Nouveau@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/nouveau

WARNING: multiple messages have this Message-ID (diff)
From: Thierry Reding <thierry.reding@gmail.com>
To: Ben Skeggs <bskeggs@redhat.com>
Cc: linux-tegra@vger.kernel.org, nouveau@lists.freedesktop.org,
	dri-devel@lists.freedesktop.org
Subject: [PATCH v3 5/9] drm/nouveau: tegra: Avoid pulsing reset twice
Date: Mon,  9 Dec 2019 13:00:01 +0100	[thread overview]
Message-ID: <20191209120005.2254786-6-thierry.reding@gmail.com> (raw)
In-Reply-To: <20191209120005.2254786-1-thierry.reding@gmail.com>

From: Thierry Reding <treding@nvidia.com>

When the GPU powergate is controlled by a generic power domain provider,
the reset will automatically be asserted and deasserted as part of the
power-ungating procedure.

On some Jetson TX2 boards, doing an additional assert and deassert of
the GPU outside of the power-ungate procedure can cause the GPU to go
into a bad state where the memory interface can no longer access system
memory.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c
index 0e372a190d3f..747a775121cf 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c
@@ -52,18 +52,18 @@ nvkm_device_tegra_power_up(struct nvkm_device_tegra *tdev)
 	clk_set_rate(tdev->clk_pwr, 204000000);
 	udelay(10);
 
-	reset_control_assert(tdev->rst);
-	udelay(10);
-
 	if (!tdev->pdev->dev.pm_domain) {
+		reset_control_assert(tdev->rst);
+		udelay(10);
+
 		ret = tegra_powergate_remove_clamping(TEGRA_POWERGATE_3D);
 		if (ret)
 			goto err_clamp;
 		udelay(10);
-	}
 
-	reset_control_deassert(tdev->rst);
-	udelay(10);
+		reset_control_deassert(tdev->rst);
+		udelay(10);
+	}
 
 	return 0;
 
-- 
2.23.0

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

  parent reply	other threads:[~2019-12-09 12:00 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-09 11:59 [PATCH v3 0/9] drm/nouveau: Various fixes for GP10B Thierry Reding
2019-12-09 11:59 ` [PATCH v3 1/9] iommu: Document iommu_fwspec::flags field Thierry Reding
2019-12-09 11:59 ` [PATCH v3 2/9] iommu: Add dummy dev_iommu_fwspec_get() helper Thierry Reding
2019-12-09 11:59 ` [PATCH v3 3/9] drm/nouveau: fault: Add support for GP10B Thierry Reding
     [not found] ` <20191209120005.2254786-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2019-12-09 12:00   ` [PATCH v3 4/9] drm/nouveau: tegra: Do not try to disable PCI device Thierry Reding
2019-12-09 12:00     ` Thierry Reding
2019-12-09 12:00   ` Thierry Reding [this message]
2019-12-09 12:00     ` [PATCH v3 5/9] drm/nouveau: tegra: Avoid pulsing reset twice Thierry Reding
2019-12-09 12:00   ` [PATCH v3 6/9] drm/nouveau: tegra: Set clock rate if not set Thierry Reding
2019-12-09 12:00     ` Thierry Reding
2019-12-09 12:00   ` [PATCH v3 7/9] drm/nouveau: secboot: Read WPR configuration from GPU registers Thierry Reding
2019-12-09 12:00     ` Thierry Reding
2019-12-09 12:00   ` [PATCH v3 8/9] drm/nouveau: gp10b: Add custom L2 cache implementation Thierry Reding
2019-12-09 12:00     ` Thierry Reding
2019-12-09 12:00 ` [PATCH v3 9/9] drm/nouveau: gp10b: Use correct copy engine Thierry Reding
2019-12-10  8:15 ` [Nouveau] [PATCH v3 0/9] drm/nouveau: Various fixes for GP10B Ben Skeggs
2019-12-10  8:15   ` Ben Skeggs
     [not found]   ` <CACAvsv4NX7jvZb5_X5auU4-KKk9PfmtJvmnQNjY7ihqgXaRS6A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2019-12-10 13:12     ` Thierry Reding
2019-12-10 13:12       ` [Nouveau] " Thierry Reding

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