From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 1/6] drm/i915/fbc: Reject PLANE_OFFSET.y%4!=0 on icl+ too
Date: Fri, 13 Dec 2019 15:34:48 +0200 [thread overview]
Message-ID: <20191213133453.22152-1-ville.syrjala@linux.intel.com> (raw)
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
icl and tgl are still affected by the modulo 4 PLANE_OFFSET.y
underrun issue. Reject such configurations on all gen9+ platforms.
Can be reproduced easily with the following sequence of
hardware poking:
while {
write FBC_CTL.enable=1
wait for vblank
write PLANE_OFFSET .x=0 .y=32
write PLANE_SURF
wait for vblank
# if PLANE_OFFSET.y is multiple of 4 the underrun won't happen
write PLANE_OFFSET .x=0 .y=31
write PLANE_SURF
wait for vblank
# extra vblank wait is required here presumably
# to get FBC into the proper state
wait for vblank
write FBC_CTL.enable=0
# underrun happens some time after FBC disable
wait for vblank
}
Both 8888 and 565 pixel formats and all tilinga formats
seem affected. Reproduced on KBL/GLK/ICL/TGL. BDW confirmed
not affected.
Closes: https://gitlab.freedesktop.org/drm/intel/issues/792
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_fbc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 6f1d5c032681..a1048ece541e 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -776,7 +776,7 @@ static bool intel_fbc_can_activate(struct intel_crtc *crtc)
* having a Y offset that isn't divisible by 4 causes FIFO underrun
* and screen flicker.
*/
- if (IS_GEN_RANGE(dev_priv, 9, 10) &&
+ if (INTEL_GEN(dev_priv) >= 9 &&
(fbc->state_cache.plane.adjusted_y & 3)) {
fbc->no_fbc_reason = "plane Y offset is misaligned";
return false;
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next reply other threads:[~2019-12-13 21:09 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-13 13:34 Ville Syrjala [this message]
2019-12-13 13:34 ` [Intel-gfx] [PATCH 2/6] drm/i915/fbc: Remove second redundant intel_fbc_pre_update() call Ville Syrjala
2019-12-13 13:39 ` Chris Wilson
2019-12-13 13:34 ` [Intel-gfx] [PATCH 3/6] drm/i915/fbc: Move the plane state check into the fbc functions Ville Syrjala
2020-01-15 15:05 ` Imre Deak
2019-12-13 13:34 ` [Intel-gfx] [PATCH 4/6] drm/i915/fbc: Nuke fbc_supported() Ville Syrjala
2019-12-13 13:49 ` Chris Wilson
2019-12-13 13:34 ` [Intel-gfx] [PATCH 5/6] drm/i915/fbc: Add fbc tracepoints Ville Syrjala
2019-12-13 13:41 ` Chris Wilson
2019-12-13 14:03 ` Ville Syrjälä
2020-01-15 15:08 ` Imre Deak
2019-12-13 13:34 ` [Intel-gfx] [PATCH 6/6] drm/i915: Rename pipe update tracepoints Ville Syrjala
2019-12-13 13:41 ` Chris Wilson
2019-12-13 15:29 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/6] drm/i915/fbc: Reject PLANE_OFFSET.y%4!=0 on icl+ too Patchwork
2019-12-13 15:58 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2019-12-14 9:57 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2019-12-18 17:30 ` [Intel-gfx] [PATCH 1/6] " Imre Deak
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20191213133453.22152-1-ville.syrjala@linux.intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.