From: Masahiro Yamada <yamada.masahiro@socionext.com> To: Rob Herring <robh+dt@kernel.org>, devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org, masahiroy@kernel.org, Masahiro Yamada <yamada.masahiro@socionext.com>, Mark Rutland <mark.rutland@arm.com>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org Subject: [PATCH] dt-bindings: clock: Convert UniPhier clock to json-schema Date: Tue, 25 Feb 2020 10:03:28 +0900 [thread overview] Message-ID: <20200225010328.5638-1-yamada.masahiro@socionext.com> (raw) Convert the UniPhier clock controller binding to DT schema format. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> --- .../clock/socionext,uniphier-clock.yaml | 94 +++++++++++++ .../bindings/clock/uniphier-clock.txt | 132 ------------------ 2 files changed, 94 insertions(+), 132 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml delete mode 100644 Documentation/devicetree/bindings/clock/uniphier-clock.txt diff --git a/Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml b/Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml new file mode 100644 index 000000000000..c3930edc410f --- /dev/null +++ b/Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml @@ -0,0 +1,94 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/socionext,uniphier-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: UniPhier clock controller + +maintainers: + - Masahiro Yamada <yamada.masahiro@socionext.com> + +properties: + compatible: + oneOf: + - description: System clock + enum: + - socionext,uniphier-ld4-clock + - socionext,uniphier-pro4-clock + - socionext,uniphier-sld8-clock + - socionext,uniphier-pro5-clock + - socionext,uniphier-pxs2-clock + - socionext,uniphier-ld6b-clock + - socionext,uniphier-ld11-clock + - socionext,uniphier-ld20-clock + - socionext,uniphier-pxs3-clock + - description: Media I/O (MIO) clock, SD clock + enum: + - socionext,uniphier-ld4-mio-clock + - socionext,uniphier-pro4-mio-clock + - socionext,uniphier-sld8-mio-clock + - socionext,uniphier-pro5-sd-clock + - socionext,uniphier-pxs2-sd-clock + - socionext,uniphier-ld11-mio-clock + - socionext,uniphier-ld20-sd-clock + - socionext,uniphier-pxs3-sd-clock + - description: Peripheral clock + enum: + - socionext,uniphier-ld4-peri-clock + - socionext,uniphier-pro4-peri-clock + - socionext,uniphier-sld8-peri-clock + - socionext,uniphier-pro5-peri-clock + - socionext,uniphier-pxs2-peri-clock + - socionext,uniphier-ld11-peri-clock + - socionext,uniphier-ld20-peri-clock + - socionext,uniphier-pxs3-peri-clock + + "#clock-cells": + const: 1 + +additionalProperties: false + +required: + - compatible + - "#clock-cells" + +examples: + - | + sysctrl@61840000 { + compatible = "socionext,uniphier-sysctrl", "simple-mfd", "syscon"; + reg = <0x61840000 0x4000>; + + clock { + compatible = "socionext,uniphier-ld11-clock"; + #clock-cells = <1>; + }; + + // other nodes ... + }; + + - | + mioctrl@59810000 { + compatible = "socionext,uniphier-mioctrl", "simple-mfd", "syscon"; + reg = <0x59810000 0x800>; + + clock { + compatible = "socionext,uniphier-ld11-mio-clock"; + #clock-cells = <1>; + }; + + // other nodes ... + }; + + - | + perictrl@59820000 { + compatible = "socionext,uniphier-perictrl", "simple-mfd", "syscon"; + reg = <0x59820000 0x200>; + + clock { + compatible = "socionext,uniphier-ld11-peri-clock"; + #clock-cells = <1>; + }; + + // other nodes ... + }; diff --git a/Documentation/devicetree/bindings/clock/uniphier-clock.txt b/Documentation/devicetree/bindings/clock/uniphier-clock.txt deleted file mode 100644 index 7b5f602765fe..000000000000 --- a/Documentation/devicetree/bindings/clock/uniphier-clock.txt +++ /dev/null @@ -1,132 +0,0 @@ -UniPhier clock controller - - -System clock ------------- - -Required properties: -- compatible: should be one of the following: - "socionext,uniphier-ld4-clock" - for LD4 SoC. - "socionext,uniphier-pro4-clock" - for Pro4 SoC. - "socionext,uniphier-sld8-clock" - for sLD8 SoC. - "socionext,uniphier-pro5-clock" - for Pro5 SoC. - "socionext,uniphier-pxs2-clock" - for PXs2/LD6b SoC. - "socionext,uniphier-ld11-clock" - for LD11 SoC. - "socionext,uniphier-ld20-clock" - for LD20 SoC. - "socionext,uniphier-pxs3-clock" - for PXs3 SoC -- #clock-cells: should be 1. - -Example: - - sysctrl@61840000 { - compatible = "socionext,uniphier-sysctrl", - "simple-mfd", "syscon"; - reg = <0x61840000 0x4000>; - - clock { - compatible = "socionext,uniphier-ld11-clock"; - #clock-cells = <1>; - }; - - other nodes ... - }; - -Provided clocks: - - 8: ST DMAC -12: GIO (Giga bit stream I/O) -14: USB3 ch0 host -15: USB3 ch1 host -16: USB3 ch0 PHY0 -17: USB3 ch0 PHY1 -20: USB3 ch1 PHY0 -21: USB3 ch1 PHY1 - - -Media I/O (MIO) clock, SD clock -------------------------------- - -Required properties: -- compatible: should be one of the following: - "socionext,uniphier-ld4-mio-clock" - for LD4 SoC. - "socionext,uniphier-pro4-mio-clock" - for Pro4 SoC. - "socionext,uniphier-sld8-mio-clock" - for sLD8 SoC. - "socionext,uniphier-pro5-sd-clock" - for Pro5 SoC. - "socionext,uniphier-pxs2-sd-clock" - for PXs2/LD6b SoC. - "socionext,uniphier-ld11-mio-clock" - for LD11 SoC. - "socionext,uniphier-ld20-sd-clock" - for LD20 SoC. - "socionext,uniphier-pxs3-sd-clock" - for PXs3 SoC -- #clock-cells: should be 1. - -Example: - - mioctrl@59810000 { - compatible = "socionext,uniphier-mioctrl", - "simple-mfd", "syscon"; - reg = <0x59810000 0x800>; - - clock { - compatible = "socionext,uniphier-ld11-mio-clock"; - #clock-cells = <1>; - }; - - other nodes ... - }; - -Provided clocks: - - 0: SD ch0 host - 1: eMMC host - 2: SD ch1 host - 7: MIO DMAC - 8: USB2 ch0 host - 9: USB2 ch1 host -10: USB2 ch2 host -12: USB2 ch0 PHY -13: USB2 ch1 PHY -14: USB2 ch2 PHY - - -Peripheral clock ----------------- - -Required properties: -- compatible: should be one of the following: - "socionext,uniphier-ld4-peri-clock" - for LD4 SoC. - "socionext,uniphier-pro4-peri-clock" - for Pro4 SoC. - "socionext,uniphier-sld8-peri-clock" - for sLD8 SoC. - "socionext,uniphier-pro5-peri-clock" - for Pro5 SoC. - "socionext,uniphier-pxs2-peri-clock" - for PXs2/LD6b SoC. - "socionext,uniphier-ld11-peri-clock" - for LD11 SoC. - "socionext,uniphier-ld20-peri-clock" - for LD20 SoC. - "socionext,uniphier-pxs3-peri-clock" - for PXs3 SoC -- #clock-cells: should be 1. - -Example: - - perictrl@59820000 { - compatible = "socionext,uniphier-perictrl", - "simple-mfd", "syscon"; - reg = <0x59820000 0x200>; - - clock { - compatible = "socionext,uniphier-ld11-peri-clock"; - #clock-cells = <1>; - }; - - other nodes ... - }; - -Provided clocks: - - 0: UART ch0 - 1: UART ch1 - 2: UART ch2 - 3: UART ch3 - 4: I2C ch0 - 5: I2C ch1 - 6: I2C ch2 - 7: I2C ch3 - 8: I2C ch4 - 9: I2C ch5 -10: I2C ch6 -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Masahiro Yamada <yamada.masahiro@socionext.com> To: Rob Herring <robh+dt@kernel.org>, devicetree@vger.kernel.org Cc: Mark Rutland <mark.rutland@arm.com>, Stephen Boyd <sboyd@kernel.org>, masahiroy@kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Masahiro Yamada <yamada.masahiro@socionext.com>, Michael Turquette <mturquette@baylibre.com>, linux-arm-kernel@lists.infradead.org Subject: [PATCH] dt-bindings: clock: Convert UniPhier clock to json-schema Date: Tue, 25 Feb 2020 10:03:28 +0900 [thread overview] Message-ID: <20200225010328.5638-1-yamada.masahiro@socionext.com> (raw) Convert the UniPhier clock controller binding to DT schema format. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> --- .../clock/socionext,uniphier-clock.yaml | 94 +++++++++++++ .../bindings/clock/uniphier-clock.txt | 132 ------------------ 2 files changed, 94 insertions(+), 132 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml delete mode 100644 Documentation/devicetree/bindings/clock/uniphier-clock.txt diff --git a/Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml b/Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml new file mode 100644 index 000000000000..c3930edc410f --- /dev/null +++ b/Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml @@ -0,0 +1,94 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/socionext,uniphier-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: UniPhier clock controller + +maintainers: + - Masahiro Yamada <yamada.masahiro@socionext.com> + +properties: + compatible: + oneOf: + - description: System clock + enum: + - socionext,uniphier-ld4-clock + - socionext,uniphier-pro4-clock + - socionext,uniphier-sld8-clock + - socionext,uniphier-pro5-clock + - socionext,uniphier-pxs2-clock + - socionext,uniphier-ld6b-clock + - socionext,uniphier-ld11-clock + - socionext,uniphier-ld20-clock + - socionext,uniphier-pxs3-clock + - description: Media I/O (MIO) clock, SD clock + enum: + - socionext,uniphier-ld4-mio-clock + - socionext,uniphier-pro4-mio-clock + - socionext,uniphier-sld8-mio-clock + - socionext,uniphier-pro5-sd-clock + - socionext,uniphier-pxs2-sd-clock + - socionext,uniphier-ld11-mio-clock + - socionext,uniphier-ld20-sd-clock + - socionext,uniphier-pxs3-sd-clock + - description: Peripheral clock + enum: + - socionext,uniphier-ld4-peri-clock + - socionext,uniphier-pro4-peri-clock + - socionext,uniphier-sld8-peri-clock + - socionext,uniphier-pro5-peri-clock + - socionext,uniphier-pxs2-peri-clock + - socionext,uniphier-ld11-peri-clock + - socionext,uniphier-ld20-peri-clock + - socionext,uniphier-pxs3-peri-clock + + "#clock-cells": + const: 1 + +additionalProperties: false + +required: + - compatible + - "#clock-cells" + +examples: + - | + sysctrl@61840000 { + compatible = "socionext,uniphier-sysctrl", "simple-mfd", "syscon"; + reg = <0x61840000 0x4000>; + + clock { + compatible = "socionext,uniphier-ld11-clock"; + #clock-cells = <1>; + }; + + // other nodes ... + }; + + - | + mioctrl@59810000 { + compatible = "socionext,uniphier-mioctrl", "simple-mfd", "syscon"; + reg = <0x59810000 0x800>; + + clock { + compatible = "socionext,uniphier-ld11-mio-clock"; + #clock-cells = <1>; + }; + + // other nodes ... + }; + + - | + perictrl@59820000 { + compatible = "socionext,uniphier-perictrl", "simple-mfd", "syscon"; + reg = <0x59820000 0x200>; + + clock { + compatible = "socionext,uniphier-ld11-peri-clock"; + #clock-cells = <1>; + }; + + // other nodes ... + }; diff --git a/Documentation/devicetree/bindings/clock/uniphier-clock.txt b/Documentation/devicetree/bindings/clock/uniphier-clock.txt deleted file mode 100644 index 7b5f602765fe..000000000000 --- a/Documentation/devicetree/bindings/clock/uniphier-clock.txt +++ /dev/null @@ -1,132 +0,0 @@ -UniPhier clock controller - - -System clock ------------- - -Required properties: -- compatible: should be one of the following: - "socionext,uniphier-ld4-clock" - for LD4 SoC. - "socionext,uniphier-pro4-clock" - for Pro4 SoC. - "socionext,uniphier-sld8-clock" - for sLD8 SoC. - "socionext,uniphier-pro5-clock" - for Pro5 SoC. - "socionext,uniphier-pxs2-clock" - for PXs2/LD6b SoC. - "socionext,uniphier-ld11-clock" - for LD11 SoC. - "socionext,uniphier-ld20-clock" - for LD20 SoC. - "socionext,uniphier-pxs3-clock" - for PXs3 SoC -- #clock-cells: should be 1. - -Example: - - sysctrl@61840000 { - compatible = "socionext,uniphier-sysctrl", - "simple-mfd", "syscon"; - reg = <0x61840000 0x4000>; - - clock { - compatible = "socionext,uniphier-ld11-clock"; - #clock-cells = <1>; - }; - - other nodes ... - }; - -Provided clocks: - - 8: ST DMAC -12: GIO (Giga bit stream I/O) -14: USB3 ch0 host -15: USB3 ch1 host -16: USB3 ch0 PHY0 -17: USB3 ch0 PHY1 -20: USB3 ch1 PHY0 -21: USB3 ch1 PHY1 - - -Media I/O (MIO) clock, SD clock -------------------------------- - -Required properties: -- compatible: should be one of the following: - "socionext,uniphier-ld4-mio-clock" - for LD4 SoC. - "socionext,uniphier-pro4-mio-clock" - for Pro4 SoC. - "socionext,uniphier-sld8-mio-clock" - for sLD8 SoC. - "socionext,uniphier-pro5-sd-clock" - for Pro5 SoC. - "socionext,uniphier-pxs2-sd-clock" - for PXs2/LD6b SoC. - "socionext,uniphier-ld11-mio-clock" - for LD11 SoC. - "socionext,uniphier-ld20-sd-clock" - for LD20 SoC. - "socionext,uniphier-pxs3-sd-clock" - for PXs3 SoC -- #clock-cells: should be 1. - -Example: - - mioctrl@59810000 { - compatible = "socionext,uniphier-mioctrl", - "simple-mfd", "syscon"; - reg = <0x59810000 0x800>; - - clock { - compatible = "socionext,uniphier-ld11-mio-clock"; - #clock-cells = <1>; - }; - - other nodes ... - }; - -Provided clocks: - - 0: SD ch0 host - 1: eMMC host - 2: SD ch1 host - 7: MIO DMAC - 8: USB2 ch0 host - 9: USB2 ch1 host -10: USB2 ch2 host -12: USB2 ch0 PHY -13: USB2 ch1 PHY -14: USB2 ch2 PHY - - -Peripheral clock ----------------- - -Required properties: -- compatible: should be one of the following: - "socionext,uniphier-ld4-peri-clock" - for LD4 SoC. - "socionext,uniphier-pro4-peri-clock" - for Pro4 SoC. - "socionext,uniphier-sld8-peri-clock" - for sLD8 SoC. - "socionext,uniphier-pro5-peri-clock" - for Pro5 SoC. - "socionext,uniphier-pxs2-peri-clock" - for PXs2/LD6b SoC. - "socionext,uniphier-ld11-peri-clock" - for LD11 SoC. - "socionext,uniphier-ld20-peri-clock" - for LD20 SoC. - "socionext,uniphier-pxs3-peri-clock" - for PXs3 SoC -- #clock-cells: should be 1. - -Example: - - perictrl@59820000 { - compatible = "socionext,uniphier-perictrl", - "simple-mfd", "syscon"; - reg = <0x59820000 0x200>; - - clock { - compatible = "socionext,uniphier-ld11-peri-clock"; - #clock-cells = <1>; - }; - - other nodes ... - }; - -Provided clocks: - - 0: UART ch0 - 1: UART ch1 - 2: UART ch2 - 3: UART ch3 - 4: I2C ch0 - 5: I2C ch1 - 6: I2C ch2 - 7: I2C ch3 - 8: I2C ch4 - 9: I2C ch5 -10: I2C ch6 -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next reply other threads:[~2020-02-25 1:04 UTC|newest] Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-02-25 1:03 Masahiro Yamada [this message] 2020-02-25 1:03 ` [PATCH] dt-bindings: clock: Convert UniPhier clock to json-schema Masahiro Yamada 2020-03-02 20:52 ` Rob Herring 2020-03-02 20:52 ` Rob Herring
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20200225010328.5638-1-yamada.masahiro@socionext.com \ --to=yamada.masahiro@socionext.com \ --cc=devicetree@vger.kernel.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-clk@vger.kernel.org \ --cc=linux-kernel@vger.kernel.org \ --cc=mark.rutland@arm.com \ --cc=masahiroy@kernel.org \ --cc=mturquette@baylibre.com \ --cc=robh+dt@kernel.org \ --cc=sboyd@kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.