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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v2 01/20] drm/i915: Handle some leftover s/intel_crtc/crtc/
Date: Tue, 25 Feb 2020 19:11:06 +0200	[thread overview]
Message-ID: <20200225171125.28885-2-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20200225171125.28885-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Switch to the preferred 'crtc' name for our crtc variables.

Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 23 +++++++++++------------
 1 file changed, 11 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 22aa205793e5..543634d3e10c 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2776,7 +2776,7 @@ static bool ilk_validate_wm_level(int level,
 }
 
 static void ilk_compute_wm_level(const struct drm_i915_private *dev_priv,
-				 const struct intel_crtc *intel_crtc,
+				 const struct intel_crtc *crtc,
 				 int level,
 				 struct intel_crtc_state *crtc_state,
 				 const struct intel_plane_state *pristate,
@@ -3107,7 +3107,7 @@ static bool ilk_validate_pipe_wm(const struct drm_i915_private *dev_priv,
 static int ilk_compute_pipe_wm(struct intel_crtc_state *crtc_state)
 {
 	struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
-	struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc);
+	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	struct intel_pipe_wm *pipe_wm;
 	struct intel_plane *plane;
 	const struct intel_plane_state *plane_state;
@@ -3147,7 +3147,7 @@ static int ilk_compute_pipe_wm(struct intel_crtc_state *crtc_state)
 		usable_level = 0;
 
 	memset(&pipe_wm->wm, 0, sizeof(pipe_wm->wm));
-	ilk_compute_wm_level(dev_priv, intel_crtc, 0, crtc_state,
+	ilk_compute_wm_level(dev_priv, crtc, 0, crtc_state,
 			     pristate, sprstate, curstate, &pipe_wm->wm[0]);
 
 	if (!ilk_validate_pipe_wm(dev_priv, pipe_wm))
@@ -3158,7 +3158,7 @@ static int ilk_compute_pipe_wm(struct intel_crtc_state *crtc_state)
 	for (level = 1; level <= usable_level; level++) {
 		struct intel_wm_level *wm = &pipe_wm->wm[level];
 
-		ilk_compute_wm_level(dev_priv, intel_crtc, level, crtc_state,
+		ilk_compute_wm_level(dev_priv, crtc, level, crtc_state,
 				     pristate, sprstate, curstate, wm);
 
 		/*
@@ -4549,9 +4549,8 @@ static int
 skl_allocate_pipe_ddb(struct intel_crtc_state *crtc_state)
 {
 	struct drm_atomic_state *state = crtc_state->uapi.state;
-	struct drm_crtc *crtc = crtc_state->uapi.crtc;
-	struct drm_i915_private *dev_priv = to_i915(crtc->dev);
-	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	struct skl_ddb_entry *alloc = &crtc_state->wm.skl.ddb;
 	u16 alloc_size, start = 0;
 	u16 total[I915_MAX_PLANES] = {};
@@ -4609,7 +4608,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *crtc_state)
 	 */
 	for (level = ilk_wm_max_level(dev_priv); level >= 0; level--) {
 		blocks = 0;
-		for_each_plane_id_on_crtc(intel_crtc, plane_id) {
+		for_each_plane_id_on_crtc(crtc, plane_id) {
 			const struct skl_plane_wm *wm =
 				&crtc_state->wm.skl.optimal.planes[plane_id];
 
@@ -4646,7 +4645,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *crtc_state)
 	 * watermark level, plus an extra share of the leftover blocks
 	 * proportional to its relative data rate.
 	 */
-	for_each_plane_id_on_crtc(intel_crtc, plane_id) {
+	for_each_plane_id_on_crtc(crtc, plane_id) {
 		const struct skl_plane_wm *wm =
 			&crtc_state->wm.skl.optimal.planes[plane_id];
 		u64 rate;
@@ -4685,7 +4684,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *crtc_state)
 
 	/* Set the actual DDB start/end points for each plane */
 	start = alloc->start;
-	for_each_plane_id_on_crtc(intel_crtc, plane_id) {
+	for_each_plane_id_on_crtc(crtc, plane_id) {
 		struct skl_ddb_entry *plane_alloc =
 			&crtc_state->wm.skl.plane_ddb_y[plane_id];
 		struct skl_ddb_entry *uv_plane_alloc =
@@ -4719,7 +4718,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *crtc_state)
 	 * that aren't actually possible.
 	 */
 	for (level++; level <= ilk_wm_max_level(dev_priv); level++) {
-		for_each_plane_id_on_crtc(intel_crtc, plane_id) {
+		for_each_plane_id_on_crtc(crtc, plane_id) {
 			struct skl_plane_wm *wm =
 				&crtc_state->wm.skl.optimal.planes[plane_id];
 
@@ -4756,7 +4755,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *crtc_state)
 	 * Go back and disable the transition watermark if it turns out we
 	 * don't have enough DDB blocks for it.
 	 */
-	for_each_plane_id_on_crtc(intel_crtc, plane_id) {
+	for_each_plane_id_on_crtc(crtc, plane_id) {
 		struct skl_plane_wm *wm =
 			&crtc_state->wm.skl.optimal.planes[plane_id];
 
-- 
2.24.1

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  reply	other threads:[~2020-02-25 17:14 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-25 17:11 [Intel-gfx] [PATCH v2 00/20] drm/i915: Proper dbuf global state Ville Syrjala
2020-02-25 17:11 ` Ville Syrjala [this message]
2020-02-26  9:29   ` [Intel-gfx] [PATCH v2 01/20] drm/i915: Handle some leftover s/intel_crtc/crtc/ Jani Nikula
2020-02-25 17:11 ` [Intel-gfx] [PATCH v2 02/20] drm/i915: Remove garbage WARNs Ville Syrjala
2020-02-26  9:30   ` Jani Nikula
2020-02-25 17:11 ` [Intel-gfx] [PATCH v2 03/20] drm/i915: Add missing commas to dbuf tables Ville Syrjala
2020-02-26  9:30   ` Jani Nikula
2020-02-25 17:11 ` [Intel-gfx] [PATCH v2 04/20] drm/i915: Use a sentinel to terminate the dbuf slice arrays Ville Syrjala
2020-02-26  9:32   ` Jani Nikula
2020-02-25 17:11 ` [Intel-gfx] [PATCH v2 05/20] drm/i915: Make skl_compute_dbuf_slices() behave consistently for all platforms Ville Syrjala
2020-02-25 17:30   ` Lisovskiy, Stanislav
2020-03-02 14:50     ` Ville Syrjälä
2020-03-02 15:50       ` Lisovskiy, Stanislav
2020-04-01  7:52       ` Lisovskiy, Stanislav
2020-02-25 17:11 ` [Intel-gfx] [PATCH v2 06/20] drm/i915: Polish some dbuf debugs Ville Syrjala
2020-03-04 16:29   ` Lisovskiy, Stanislav
2020-03-04 18:26     ` Ville Syrjälä
2020-03-05  9:53       ` Lisovskiy, Stanislav
2020-03-05 13:46         ` Ville Syrjälä
2020-03-05 14:56           ` Lisovskiy, Stanislav
2020-02-25 17:11 ` [Intel-gfx] [PATCH v2 07/20] drm/i915: Unify the low level dbuf code Ville Syrjala
2020-03-04 17:14   ` Lisovskiy, Stanislav
2020-03-04 17:23   ` Lisovskiy, Stanislav
2020-03-04 18:30     ` Ville Syrjälä
2020-03-05  8:28       ` Lisovskiy, Stanislav
2020-03-05 13:37         ` Ville Syrjälä
2020-03-05 14:01           ` Lisovskiy, Stanislav
2020-03-05  8:46   ` Lisovskiy, Stanislav
2020-02-25 17:11 ` [Intel-gfx] [PATCH v2 08/20] drm/i915: Introduce proper dbuf state Ville Syrjala
2020-02-25 17:43   ` Lisovskiy, Stanislav
2020-04-01  8:13   ` Lisovskiy, Stanislav
2020-02-25 17:11 ` [Intel-gfx] [PATCH v2 09/20] drm/i915: Nuke skl_ddb_get_hw_state() Ville Syrjala
2020-02-26 11:40   ` Lisovskiy, Stanislav
2020-02-25 17:11 ` [Intel-gfx] [PATCH v2 10/20] drm/i915: Move the dbuf pre/post plane update Ville Syrjala
2020-02-26 11:38   ` Lisovskiy, Stanislav
2020-02-25 17:11 ` [Intel-gfx] [PATCH v2 11/20] drm/i915: Clean up dbuf debugs during .atomic_check() Ville Syrjala
2020-02-26 11:32   ` Lisovskiy, Stanislav
2020-02-25 17:11 ` [Intel-gfx] [PATCH v2 12/20] drm/i915: Extract intel_crtc_ddb_weight() Ville Syrjala
2020-02-25 17:11 ` [Intel-gfx] [PATCH v2 13/20] drm/i915: Pass the crtc to skl_compute_dbuf_slices() Ville Syrjala
2020-02-26  8:41   ` Lisovskiy, Stanislav
2020-02-25 17:11 ` [Intel-gfx] [PATCH v2 14/20] drm/i915: Introduce intel_dbuf_slice_size() Ville Syrjala
2020-02-25 17:11 ` [Intel-gfx] [PATCH v2 15/20] drm/i915: Introduce skl_ddb_entry_for_slices() Ville Syrjala
2020-02-25 17:11 ` [Intel-gfx] [PATCH v2 16/20] drm/i915: Move pipe ddb entries into the dbuf state Ville Syrjala
2020-02-27 16:50   ` Ville Syrjala
2020-02-25 17:11 ` [Intel-gfx] [PATCH v2 17/20] drm/i915: Extract intel_crtc_dbuf_weights() Ville Syrjala
2020-02-25 17:11 ` [Intel-gfx] [PATCH v2 18/20] drm/i915: Encapsulate dbuf state handling harder Ville Syrjala
2021-01-21 12:55   ` Lisovskiy, Stanislav
2020-02-25 17:11 ` [Intel-gfx] [PATCH v2 19/20] drm/i915: Do a bit more initial readout for dbuf Ville Syrjala
2021-01-21 12:57   ` Lisovskiy, Stanislav
2020-02-25 17:11 ` [Intel-gfx] [PATCH v2 20/20] drm/i915: Check slice mask for holes Ville Syrjala
2020-02-25 17:47   ` Lisovskiy, Stanislav
2020-02-26 18:04 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Proper dbuf global state (rev2) Patchwork
2020-02-27 20:21 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Proper dbuf global state (rev3) Patchwork
2020-02-27 20:43 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-02-29  2:40 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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