From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Steven Rostedt <rostedt@goodmis.org>,
Brian Gerst <brgerst@gmail.com>, Juergen Gross <jgross@suse.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Arnd Bergmann <arnd@arndb.de>
Subject: [patch 00/24] x86/entry: Consolidation - Part III
Date: Tue, 25 Feb 2020 23:16:06 +0100 [thread overview]
Message-ID: <20200225221606.511535280@linutronix.de> (raw)
Hi!
This is the third batch of a 73 patches series which consolidates the x86
entry code. The larger explanation is in the part I cover letter:
https://lore.kernel.org/r/20200225213636.689276920@linutronix.de
I applies on top of part II which can be found here:
https://lore.kernel.org/r/20200225220801.571835584@linutronix.de
This part consolidates the entry stub ASM code generation by:
- Distangling the unreadable idtentry maze on 64bit
- Providing idtentry for 32bit
- Providing exception entry point macros which
- Declare the required ASM, C and XEN/PV prototypes
- Hide the underlying C-entry magic in the macros which are used for
wrapping the actual C handler. This includes marking them notrace
and exclude them from kprobes so in a later step irq flags tracing
and enter from user space handling can be moved out from ASM into C
into one central place
- Have one header file (idtentry.h) which provides all the macros and
also acts as a collection point for all idtentries which need to be
emitted as ASM stubs.
- Converting the trivial exceptions over to the new scheme
This is the first step to get rid of the pointless differences between 32
bit and 64 bit (arch_entry.h vs. random defines in entry_64.S) and having
consistent prototypes and exception C-handler mechanics all over the place
instead of a randomly chosen implementation here and there.
This applies on top of part two which is available here:
git://git.kernel.org/pub/scm/linux/kernel/git/tglx/devel.git entry-v1-part2
To get part 1 - 3 pull from here:
git://git.kernel.org/pub/scm/linux/kernel/git/tglx/devel.git entry-v1-part3
Thanks,
tglx
8<---------------
entry/entry_32.S | 167 ++++++-------------
entry/entry_64.S | 410 ++++++++++++++++++++++++++-----------------------
include/asm/idtentry.h | 150 +++++++++++++++++
include/asm/trapnr.h | 31 +++
include/asm/traps.h | 74 --------
kernel/idt.c | 30 +--
kernel/traps.c | 129 +++++++++------
xen/enlighten_pv.c | 35 ++--
xen/xen-asm_32.S | 2
xen/xen-asm_64.S | 30 +--
10 files changed, 584 insertions(+), 474 deletions(-)
next reply other threads:[~2020-02-25 23:30 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-25 22:16 Thomas Gleixner [this message]
2020-02-25 22:16 ` [patch 01/24] x86/traps: Split trap numbers out in a seperate header Thomas Gleixner
2020-02-26 5:52 ` Andy Lutomirski
2020-02-28 9:39 ` Alexandre Chartre
2020-02-25 22:16 ` [patch 02/24] x86/entry/64: Avoid pointless code when CONTEXT_TRACKING=n Thomas Gleixner
2020-02-26 5:52 ` Andy Lutomirski
2020-02-28 9:40 ` Alexandre Chartre
2020-03-02 22:25 ` Frederic Weisbecker
2020-02-25 22:16 ` [patch 03/24] x86/entry/64: Reorder idtentries Thomas Gleixner
2020-02-26 5:53 ` Andy Lutomirski
2020-02-28 9:40 ` Alexandre Chartre
2020-02-25 22:16 ` [patch 04/24] x86/entry: Distangle idtentry Thomas Gleixner
2020-02-28 10:27 ` Alexandre Chartre
2020-02-25 22:16 ` [patch 05/24] x86/entry/32: Provide macro to emit IDT entry stubs Thomas Gleixner
2020-02-28 10:33 ` Alexandre Chartre
2020-02-25 22:16 ` [patch 06/24] x86/idtentry: Provide macros to define/declare IDT entry points Thomas Gleixner
2020-02-28 10:42 ` Alexandre Chartre
2020-03-04 12:46 ` Thomas Gleixner
2020-02-25 22:16 ` [patch 07/24] x86/traps: Prepare for using DEFINE_IDTENTRY Thomas Gleixner
2020-02-28 14:13 ` Alexandre Chartre
2020-02-28 14:18 ` Thomas Gleixner
2020-02-25 22:16 ` [patch 08/24] x86/entry: Convert Divide Error to IDTENTRY Thomas Gleixner
2020-02-28 14:58 ` Alexandre Chartre
2020-03-04 13:09 ` Thomas Gleixner
2020-02-25 22:16 ` [patch 09/24] x86/entry: Convert Overflow exception " Thomas Gleixner
2020-02-25 22:16 ` [patch 10/24] x86/entry: Convert INT3 " Thomas Gleixner
2020-02-25 22:16 ` [patch 11/24] x86/entry: Convert Bounds " Thomas Gleixner
2020-02-25 22:16 ` [patch 12/24] x86/entry: Convert Invalid Opcode " Thomas Gleixner
2020-02-25 22:16 ` [patch 13/24] x86/entry: Convert Device not available " Thomas Gleixner
2020-02-25 22:16 ` [patch 14/24] x86/entry: Convert Coprocessor segment overrun " Thomas Gleixner
2020-02-25 22:16 ` [patch 15/24] x86/entry: Provide IDTENTRY_ERRORCODE Thomas Gleixner
2020-02-25 22:16 ` [patch 16/24] x86/entry: Convert Invalid TSS exception to IDTENTRY Thomas Gleixner
2020-02-25 22:16 ` [patch 17/24] x86/entry: Convert Segment not present " Thomas Gleixner
2020-02-25 22:16 ` [patch 18/24] x86/entry: Convert Stack segment " Thomas Gleixner
2020-02-25 22:16 ` [patch 19/24] x86/entry: Convert General protection " Thomas Gleixner
2020-02-25 22:16 ` [patch 20/24] x86/entry: Convert Spurious interrupt bug " Thomas Gleixner
2020-02-25 22:16 ` [patch 21/24] x86/entry: Convert Coprocessor error " Thomas Gleixner
2020-02-25 22:16 ` [patch 22/24] x86/entry: Convert Alignment check " Thomas Gleixner
2020-02-25 22:16 ` [patch 23/24] x86/entry: Convert SIMD coprocessor error " Thomas Gleixner
2020-02-25 22:16 ` [patch 24/24] x86/entry/32: Convert IRET exception to IDTENTRY_SW Thomas Gleixner
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